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2015-09-23ppc/spapr: Implement H_RANDOM hypercall in QEMUThomas Huth1-0/+5
The PAPR interface defines a hypercall to pass high-quality hardware generated random numbers to guests. Recent kernels can already provide this hypercall to the guest if the right hardware random number generator is available. But in case the user wants to use another source like EGD, or QEMU is running with an older kernel, we should also have this call in QEMU, so that guests that do not support virtio-rng yet can get good random numbers, too. This patch now adds a new pseudo-device to QEMU that either directly provides this hypercall to the guest or is able to enable the in-kernel hypercall if available. The in-kernel hypercall can be enabled with the use-kvm property, e.g.: qemu-system-ppc64 -device spapr-rng,use-kvm=true For handling the hypercall in QEMU instead, a "RngBackend" is required since the hypercall should provide "good" random data instead of pseudo-random (like from a "simple" library function like rand() or g_random_int()). Since there are multiple RngBackends available, the user must select an appropriate back-end via the "rng" property of the device, e.g.: qemu-system-ppc64 -object rng-random,filename=/dev/hwrng,id=gid0 \ -device spapr-rng,rng=gid0 ... See http://wiki.qemu-project.org/Features-Done/VirtIORNG for other example of specifying RngBackends. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-09-23spapr: Enable in-kernel H_SET_MODE handlingAlexey Kardashevskiy1-0/+5
For setting debug watchpoints, sPAPR guests use H_SET_MODE hypercall. The existing QEMU H_SET_MODE handler does not support this but the KVM handler in HV KVM does. However it is not enabled. This enables the in-kernel H_SET_MODE handler which handles: - Completed Instruction Address Breakpoint Register - Watch point 0 registers. The rest is still handled in QEMU. Reported-by: Anton Blanchard <anton@samba.org> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-09-20kvm_ppc: remove kvmppc_timer_hackPaolo Bonzini1-2/+0
QEMU does have an I/O thread now, that can be interrupted at any time because the VCPU thread runs outside the iothread mutex. Therefore, the kvmppc_timer_hack is obsolete. Remove it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-03pseries: Enable in-kernel H_LOGICAL_CI_{LOAD, STORE} implementationsDavid Gibson1-0/+5
qemu currently implements the hypercalls H_LOGICAL_CI_LOAD and H_LOGICAL_CI_STORE as PAPR extensions. These are used by the SLOF firmware for IO, because performing cache inhibited MMIO accesses with the MMU off (real mode) is very awkward on POWER. This approach breaks when SLOF needs to access IO devices implemented within KVM instead of in qemu. The simplest example would be virtio-blk using an iothread, because the iothread / dataplane mechanism relies on an in-kernel implementation of the virtio queue notification MMIO. To fix this, an in-kernel implementation of these hypercalls has been made, (kernel commit 99342cf "kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM" however, the hypercalls still need to be enabled from qemu. This performs the necessary calls to do so. It would be nice to provide some warning if we encounter a problematic device with a kernel which doesn't support the new calls. Unfortunately, I can't see a way to detect this case which won't either warn in far too many cases that will probably work, or which is horribly invasive. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-09-08spapr: add uuid/host details to device treeNikunj A Dadhania1-0/+12
Useful for identifying the guest/host uniquely within the guest. Adding following properties to the guest root node. vm,uuid - uuid of the guest host-model - Host model number host-serial - Host machine serial number hypervisor type - Tells its "kvm" Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-15spapr: Move RMA memory region registration codeAlexey Kardashevskiy1-2/+2
PPC970 does not support VRMA (virtual RMA) so real memory required for SLOF to execute must be allocated by the KVM_ALLOCATE_RMA ioctl. Later this memory is used as a part of the guest RAM area. The RMA allocating code also registers a memory region for this piece of RAM. We are going to simplify memory regions layout: RMA memory region will be a subregion in the RAM memory region, both starting from zero. This way we will not have to take care of start address alignment for the piece of RAM next to the RMA. This moves memory region business closer to the RAM memory region creation/allocation code. As this is a mechanical patch, no change in behaviour is expected. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [agraf: fix compilation on non-kvm systems] Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-27spapr_iommu: Make in-kernel TCE table optionalAlexey Kardashevskiy1-2/+4
POWER KVM supports an KVM_CAP_SPAPR_TCE capability which allows allocating TCE tables in the host kernel memory and handle H_PUT_TCE requests targeted to specific LIOBN (logical bus number) right in the host without switching to QEMU. At the moment this is used for emulated devices only and the handler only puts TCE to the table. If the in-kernel H_PUT_TCE handler finds a LIOBN and corresponding table, it will put a TCE to the table and complete hypercall execution. The user space will not be notified. Upcoming VFIO support is going to use the same sPAPRTCETable device class so KVM_CAP_SPAPR_TCE is going to be used as well. That means that TCE tables for VFIO are going to be allocated in the host as well. However VFIO operates with real IOMMU tables and simple copying of a TCE to the real hardware TCE table will not work as guest physical to host physical address translation is requited. So until the host kernel gets VFIO support for H_PUT_TCE, we better not to register VFIO's TCE in the host. This adds a place holder for KVM_CAP_SPAPR_TCE_VFIO capability. It is not in upstream yet and being discussed so now it is always false which means that in-kernel VFIO acceleration is not supported. This adds a bool @vfio_accel flag to the sPAPRTCETable device telling that sPAPRTCETable should not try allocating TCE table in the host kernel for VFIO. The flag is false now as at the moment there is no VFIO. This adds an vfio_accel parameter to spapr_tce_new_table(), the semantic is the same. Since there is only emulated PCI and VIO now, the flag is set to false. Upcoming VFIO support will set it to true. This is a preparation patch so no change in behaviour is expected Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16KVM: PPC: Expose fixup hcall capabilityAlexander Graf1-0/+6
New kvm versions expose a PPC_FIXUP_HCALL capability. Make it visible to machine code so we can take decisions based on it. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16spapr_iommu: Get rid of window_size in sPAPRTCETableAlexey Kardashevskiy1-1/+1
This removes window_size as it is basically a copy of nb_table shifted by SPAPR_TCE_PAGE_SHIFT. As new dynamic DMA windows are going to support windows as big as the entire RAM and this number will be bigger that 32 capacity, we will have to do something about @window_size anyway and removal seems to be the right way to go. This removes dma_window_start/dma_window_size from sPAPRPHBState as they are no longer used. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16spapr_iommu: Enable multiple TCE requestsAlexey Kardashevskiy1-0/+6
Currently only single TCE entry per request is supported (H_PUT_TCE). However PAPR+ specification allows multiple entry requests such as H_PUT_TCE_INDIRECT and H_STUFF_TCE. Having less transitions to the host kernel via ioctls, support of these calls can accelerate IOMMU operations. This implements H_STUFF_TCE and H_PUT_TCE_INDIRECT. This advertises "multi-tce" capability to the guest if the host kernel supports it (KVM_CAP_SPAPR_MULTITCE) or guest is running in TCG mode. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16KVM: PPC: Enable compatibility modeAlexey Kardashevskiy1-0/+6
The host kernel implements a KVM_REG_PPC_ARCH_COMPAT register which this uses to enable a compatibility mode if any chosen. This sets the KVM_REG_PPC_ARCH_COMPAT register in KVM. ppc_set_compat() signals the caller if the mode cannot be enabled by the host kernel. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [agraf: fix TCG compat setting] Signed-off-by: Alexander Graf <agraf@suse.de>
2014-03-05target-ppc: add PowerPCCPU::cpu_dt_idAlexey Kardashevskiy1-6/+0
Normally CPUState::cpu_index is used to pick the right CPU for various operations. However default consecutive numbering does not always work for POWERPC. These indexes are reflected in /proc/device-tree/cpus/PowerPC,POWER7@XX and used to call KVM VCPU's ioctls. In order to achieve this, kvmppc_fixup_cpu() was introduced. Roughly speaking, it multiplies cpu_index by the number of threads per core. This approach has disadvantages such as: 1. NUMA configuration stays broken after the fixup; 2. CPU-targeted commands from the QEMU Monitor do not work properly as CPU indexes have been fixed and there is no clear way for the user to know what the new CPU indexes are. This introduces a @cpu_dt_id field in the CPUPPCState struct which is initialized from @cpu_index by default and can be fixed later to meet the device tree requirements. This adds an API to handle @cpu_dt_id. This removes kvmppc_fixup_cpu() as it is not more needed, @cpu_dt_id is calculated in ppc_cpu_realize(). This will be used later in machine code. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Mike Day <ncmike@ncultra.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-03-05target-ppc: Update ppc_hash64_store_hpte to support updating in-kernel htabAneesh Kumar K.V1-0/+10
This support updating htab managed by the hypervisor. Currently we don't have any user for this feature. This actually bring the store_hpte interface in-line with the load_hpte one. We may want to use this when we want to emulate henter hcall in qemu for HV kvm. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [ folded fix for the "warn_unused_result" build break in kvmppc_hash64_write_pte(), Greg Kurz <gkurz@linux.vnet.ibm.com> ] Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-03-05target-ppc: Fix page table lookup with kvm enabledAneesh Kumar K.V1-0/+19
With kvm enabled, we store the hash page table information in the hypervisor. Use ioctl to read the htab contents. Without this we get the below error when trying to read the guest address (gdb) x/10 do_fork 0xc000000000098660 <do_fork>: Cannot access memory at address 0xc000000000098660 (gdb) Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [ fixes for 32 bit build (casts!), ldq_phys() API change, Greg Kurz <gkurz@linux.vnet.ibm.com ] Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25target-ppc: Add helper for KVM_PPC_RTAS_DEFINE_TOKENDavid Gibson1-0/+7
Recent PowerKVM allows the kernel to intercept some RTAS calls from the guest directly. This is used to implement the more efficient in-kernel XICS for example. qemu is still responsible for assigning the RTAS token numbers however, and needs to tell the kernel which RTAS function name is assigned to a given token value. This patch adds a convenience wrapper for the KVM_PPC_RTAS_DEFINE_TOKEN ioctl() which is used for this purpose. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-29pseries: savevm support with KVMAlexey Kardashevskiy1-0/+22
At present, the savevm / migration support for the pseries machine will not work when KVM is enabled. That's because KVM manages the guest's hash page table in the host kernel, so qemu has no visibility of it. This patch fixes this by using new kernel interfaces to extract and reinsert the guest's hash table during the migration process. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Message-id: 1374175984-8930-11-git-send-email-aliguori@us.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-26Enable kvm emulated watchdogBharat Bhushan1-0/+24
Enable the KVM emulated watchdog if KVM supports (use the capability enablement in watchdog handler). Also watchdog exit (KVM_EXIT_WATCHDOG) handling is added. Watchdog state machine is cleared whenever VM state changes to running. This is to handle the cases like return from debug halt etc. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> [agraf: rebase to current code base, fix non-kvm cases] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-26PPC: e500: advertise 4.2 MPIC only if KVM supports EPRStuart Yoder1-0/+6
Older KVM versions don't support EPR which breaks guests when we announce MPIC variants that support EPR. Catch that case and expose only MPIC version 2.0 which tells the guest that we don't support the EPR capability yet. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> [agraf: Add comment, route cap check through kvm_ppc.c] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-15memory: move core typedefs to qemu/typedefs.hPaolo Bonzini1-2/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-01-18PPC: KVM: Add support for EPR with KVMAlexander Graf1-0/+5
This patch links KVM EPR support to the existing TCG support we have now. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-2/+2
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-07target-ppc: Slim conversion of model definitions to QOM subclassesAndreas Färber1-6/+2
Since the model list is highly macrofied, keep ppc_def_t for now and save a pointer to it in PowerPCCPUClass. This results in a flat list of subclasses including aliases, to be refined later. Move cpu_ppc_init() to translate_init.c and drop helper.c. Long-term the idea is to turn translate_init.c into a standalone cpu.c. Inline cpu_ppc_usable() into type registration. Split cpu_ppc_register() in two by code movement into the initfn and by turning the remaining part into a realizefn. Move qemu_init_vcpu() call into the new realizefn and adapt create_ppc_opcodes() to return an Error. Change ppc_find_by_pvr() -> ppc_cpu_class_by_pvr(). Change ppc_find_by_name() -> ppc_cpu_class_by_name(). Turn -cpu host into its own subclass. This requires to move the kvm_enabled() check in ppc_cpu_class_by_name() to avoid the class being found via the normal name lookup in the !kvm_enabled() case. Turn kvmppc_host_cpu_def() into the class_init and add an initfn that asserts KVM is in fact enabled. Implement -cpu ? and the QMP equivalent in terms of subclasses. This newly exposes -cpu host to the user, ordered last for -cpu ?. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07PPC: KVM: set has-idle in guest device treeStuart Yoder1-0/+6
On e500mc, the platform doesn't provide a way for the CPU to go idle. To still not uselessly burn CPU time, expose an idle hypercall to the guest if kvm supports it. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> [agraf: adjust for current code base, add patch description, fix non-kvm case] Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-23Merge branch 'master' of git://git.qemu.org/qemu into qom-cpuAndreas Färber1-1/+1
Adapt header include paths. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-19kvm: Pass CPUState to kvm_vcpu_ioctl()Andreas Färber1-4/+4
Adapt helper functions to pass X86CPU / PowerPCCPU / S390CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-04pseries: Add support for new KVM hash table control callDavid Gibson1-0/+19
This adds support for then new "reset htab" ioctl which allows qemu to properly cleanup the MMU hash table when the guest is reset. With the corresponding kernel support, reset of a guest now works properly. This also paves the way for indicating a different size hash table to the kernel and for the kernel to be able to impose limits on the requested size. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc64: Rudimentary Support for extra page sizes on server CPUsBenjamin Herrenschmidt1-0/+5
More recent Power server chips (i.e. based on the 64 bit hash MMU) support more than just the traditional 4k and 16M page sizes. This can get quite complicated, because which page sizes are supported, which combinations are supported within an MMU segment and how these page sizes are encoded both in the SLB entry and the hash PTE can vary depending on the CPU model (they are not specified by the architecture). In addition the firmware or hypervisor may not permit use of certain page sizes, for various reasons. Whether various page sizes are supported on KVM, for example, depends on whether the PR or HV variant of KVM is in use, and on the page size of the memory backing the guest's RAM. This patch adds information to the CPUState and cpu defs to describe the supported page sizes and encodings. Since TCG does not yet support any extended page sizes, we just set this to NULL in the static CPU definitions, expanding this to the default 4k and 16M page sizes when we initialize the cpu state. When using KVM, however, we instead determine available page sizes using the new KVM_PPC_GET_SMMU_INFO call. For old kernels without that call, we use some defaults, with some guesswork which should do the right thing for existing HV and PR implementations. The fallback might not be correct for future versions, but that's ok, because they'll have KVM_PPC_GET_SMMU_INFO. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-04-15target-ppc: Add hooks for handling tcg and kvm limitationsDavid Gibson1-0/+5
On target-ppc, our table of CPU types and features encodes the features as found on the hardware, regardless of whether these features are actually usable under TCG or KVM. We already have cases where the information from the cpu table must be fixed up to account for limitations in the emulation method we're using. e.g. TCG does not support the DFP and VSX instructions and KVM needs different numbering of the CPUs in order to tell it the correct thread to core mappings. This patch cleans up these hacks to handle emulation limitations by consolidating them into a pair of functions specifically for the purpose. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [AF: Style and typo fixes, rename new functions and drop ppc_def_t arg] Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-03-14target-ppc: Don't overuse CPUStateAndreas Färber1-6/+6
Scripted conversion: sed -i "s/CPUState/CPUPPCState/g" target-ppc/*.[hc] sed -i "s/#define CPUPPCState/#define CPUState/" target-ppc/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-30ppc: Fix up usermode only buildsDavid Gibson1-0/+4
The recent usage of MemoryRegion in kvm_ppc.h breaks builds with CONFIG_USER_ONLY=y. This patch fixes it. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-30ppc: First cut implementation of -cpu hostDavid Gibson1-0/+6
For convenience with kvm, x86 allows the user to specify -cpu host on the qemu command line, which means make the guest cpu the same as the host cpu. This patch implements the same option for ppc targets. For now, this just read the host PVR (Processor Version Register) and selects one of our existing CPU specs based on it. This means that the option will not work if the host cpu is not supported by TCG, even if that wouldn't matter for use under kvm. In future, we can extend this in future to override parts of the cpu spec based on information obtained from the host (via /proc/cpuinfo, the host device tree, or explicit KVM calls). That will let us handle cases where the real kvm-virtualized CPU doesn't behave exactly like the TCG-emulated CPU. With appropriate annotation of the CPU specs we'll also then be able to use host cpus under kvm even when there isn't a matching full TCG model. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-30pseries: Add device tree properties for VMX/VSX and DFP under kvmDavid Gibson1-0/+12
Sufficiently recent PAPR specifications define properties "ibm,vmx" and "ibm,dfp" on the CPU node which advertise whether the VMX vector extensions (or the later VSX version) and/or the Decimal Floating Point operations from IBM's recent POWER CPUs are available. Currently we do not put these in the guest device tree and the guest kernel will consequently assume they are not available. This is good, because they are not supported under TCG. VMX is similar enough to Altivec that it might be trivial to support, but VSX and DFP would both require significant work to support in TCG. However, when running under kvm on a host which supports these instructions, there's no reason not to let the guest use them. This patch, therefore, checks for the relevant support on the host CPU and, if present, advertises them to the guest as well. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-30pseries: Use Book3S-HV TCE acceleration capabilitiesDavid Gibson1-0/+14
The pseries machine of qemu implements the TCE mechanism used as a virtual IOMMU for the PAPR defined virtual IO devices. Because the PAPR spec only defines a small DMA address space, the guest VIO drivers need to update TCE mappings very frequently - the virtual network device is particularly bad. This means many slow exits to qemu to emulate the H_PUT_TCE hypercall. Sufficiently recent kernels allow this to be mitigated by implementing H_PUT_TCE in the host kernel. To make use of this, however, qemu needs to initialize the necessary TCE tables, and map them into itself so that the VIO device implementations can retrieve the mappings when they access guest memory (which is treated as a virtual DMA operation). This patch adds the necessary calls to use the KVM TCE acceleration. If the kernel does not support acceleration, or there is some other error creating the accelerated TCE table, then it will still fall back to full userspace TCE implementation. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-30pseries: Allow KVM Book3S-HV on PPC970 CPUSDavid Gibson1-0/+8
At present, using the hypervisor aware Book3S-HV KVM will only work with qemu on POWER7 CPUs. PPC970 CPUs also have hypervisor capability, but they lack the VRMA feature which makes assigning guest memory easier. In order to allow KVM Book3S-HV on PPC970, we need to specially allocate the first chunk of guest memory (the "Real Mode Area" or RMA), so that it is physically contiguous. Sufficiently recent host kernels allow such contiguous RMAs to be allocated, with a kvm capability advertising whether the feature is available and/or necessary on this hardware. This patch enables qemu to use this support, thus allowing kvm acceleration of pseries qemu machines on PPC970 hardware. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de> --- agraf: fix to use memory api
2011-10-30pseries: Support SMT systems for KVM Book3S-HVDavid Gibson1-0/+6
Alex Graf has already made qemu support KVM for the pseries machine when using the Book3S-PR KVM variant (which runs the guest in usermode, emulating supervisor operations). This code allows gets us very close to also working with KVM Book3S-HV (using the hypervisor capabilities of recent POWER CPUs). This patch moves us another step towards Book3S-HV support by correctly handling SMT (multithreaded) POWER CPUs. There are two parts to this: * Querying KVM to check SMT capability, and if present, adjusting the cpu numbers that qemu assigns to cause KVM to assign guest threads to cores in the right way (this isn't automatic, because the POWER HV support has a limitation that different threads on a single core cannot be in different guests at the same time). * Correctly informing the guest OS of the SMT thread to core mappings via the device tree. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: Enable to use PAPR with PR style KVMAlexander Graf1-0/+5
When running PR style KVM, we need to tell the kernel that we want to run in PAPR mode now. This means that we need to pass some more register information down and enable papr mode. We also need to align the HTAB to htab_size boundary. Using this patch, -M pseries works with kvm even on non-hv kvm implementations, as long as the preceding kernel patches are in. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - match on CONFIG_PSERIES v2 -> v3: - remove HIOR pieces from PAPR patch (ABI breakage)
2011-10-06PPC: KVM: Add stubs for kvm helper functionsAlexander Graf1-0/+26
We have a bunch of helper functions that don't have any stubs for them in case we don't have CONFIG_KVM enabled. That didn't bite us so far, because gcc can optimize them out pretty well, but we should really provide them. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - use uint64_t for clockfreq
2011-10-06PPC: KVM: Remove kvmppc_read_host_propertyAlexander Graf1-11/+0
We just got rid of the last user of kvmppc_read_host_property, so we can now safely remove it. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: KVM: Add generic function to read host clockfreqAlexander Graf1-0/+1
We need to find out the host's clock-frequency when running on KVM, so let's export a respective function. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - enable 64bit values
2011-10-06PPC: bamboo: Move host fdt copy to targetAlexander Graf1-1/+0
We have some code in generic kvm_ppc.c that is only used by 440. Move to the 440 specific device code. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-08ppce500_mpc8544ds: Fix compile with --enable-debug and --disable-kvmDavid Gibson1-0/+9
When configured with --enable-debug, we compile without optimization. This means that the function mpc8544_copy_soc_cell() in ppce500_mpc8544ds.c is not optimized out, even though it is never called without kvm. That in turn causes a link failure, because it calls the function kvmppc_read_host_property() which is in kvm_ppc.o and therefore not included in a --disable-kvm build. This patch fixes the problem by providing a dummy stub for kvmppc_read_host_property() in kvm_ppc.h when !CONFIG_KVM. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01Implement PAPR CRQ hypercallsBen Herrenschmidt1-0/+11
This patch implements the infrastructure and hypercalls necessary for the PAPR specified CRQ (Command Request Queue) mechanism. This general request queueing system is used by many of the PAPR virtual IO devices, including the virtual scsi adapter. Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2010-09-05KVM: PPC: Add level based interrupt logicAlexander Graf1-0/+13
KVM on PowerPC used to have completely broken interrupt logic. Usually, interrupts work by having a PIC that pulls a line up/down, so the CPU knows that an interrupt is active. This line stays active until some action is done to the PIC to release the line. On KVM for PPC, we just checked if there was an interrupt pending and pulled a line in the kernel module. We never released it though, hoping that kernel space would just declare an interrupt as released when injected - which is wrong. To fix this, we need to completely redesign the interrupt injection logic. Whenever an interrupt line gets triggered, we need to notify kernel space that the line is up. Whenever it gets released, we do the same. This way we can assure that the interrupt state is always known to kernel space. This fixes random stalls in KVM guests on PowerPC that were waiting for an interrupt while everyone else thought they received it already. Signed-off-by: Alexander Graf <agraf@suse.de>
2010-08-26PPC: Add PV hypercall transport through fw_cfgAlexander Graf1-0/+1
On KVM for PPC we need to tell the guest which instructions to use when doing a hypercall. The clean way to do this is to go through an ioctl from userspace and passing it on to the guest using the device tree. So let's do the qemu part here: read out the hypercall and pass it on to the guest's fw_cfg so openBIOS can read it out and expose it again. Signed-off-by: Alexander Graf <agraf@suse.de>
2010-02-14PPC: tell the guest about the time base frequencyAlexander Graf1-0/+2
Our guest systems need to know by how much the timebase increases every second, so there usually is a "timebase-frequency" property in the cpu leaf of the device tree. This property is missing in OpenBIOS. With qemu, Linux's fallback timebase speed and qemu's internal timebase speed match up. With KVM, that is no longer true. The guest is running at the same timebase speed as the host. This leads to massive timing problems. On my test machine, a "sleep 2" takes about 14 seconds with KVM enabled. This patch exports the timebase frequency to OpenBIOS, so it can then put them into the device tree. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-01-24kvm/powerpc: extern one function for MPC85xx code useaurel321-0/+2
Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6427 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-16target-ppc: Enable KVM for ppcemb.aurel321-0/+15
Implement hooks called by generic KVM code. Also add code that will copy the host's CPU and timebase frequencies to the guest, which is necessary on KVM because the guest can directly access the timebase. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Acked-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6065 c046a42c-6fe2-441c-8c8c-71466251a162
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