| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2014-04-08 | target-ppc: Correct VSX Integer to FP Conversion | Tom Musta | 1 | -24/+13 |
| 2014-04-08 | target-ppc: Correct VSX FP to Integer Conversion | Tom Musta | 1 | -21/+15 |
| 2014-04-08 | target-ppc: Correct VSX FP to FP Conversions | Tom Musta | 1 | -5/+4 |
| 2014-04-08 | target-ppc: Correct VSX Scalar Compares | Tom Musta | 1 | -6/+7 |
| 2014-04-08 | target-ppc: Correct Simple VSR LE Host Inversions | Tom Musta | 1 | -190/+190 |
| 2014-04-08 | target-ppc: Correct LE Host Inversion of Lower VSRs | Tom Musta | 1 | -4/+4 |
| 2014-04-08 | target-ppc: Define Endian-Correct Accessors for VSR Field Access | Tom Musta | 1 | -0/+8 |
| 2014-04-08 | target-ppc: Bug: VSX Convert to Integer Should Truncate | Tom Musta | 1 | -1/+2 |
| 2014-03-13 | cpu: Move exception_index field from CPU_COMMON to CPUState | Andreas Färber | 1 | -8/+18 |
| 2014-03-05 | target-ppc: Fix Compiler Warnings Due to 64-Bit Constants Declared as UL | Tom Musta | 1 | -22/+22 |
| 2014-03-05 | target-ppc: Add ISA 2.06 ftsqrt | Tom Musta | 1 | -0/+31 |
| 2014-03-05 | target-ppc: Add ISA 2.06 ftdiv Instruction | Tom Musta | 1 | -10/+46 |
| 2014-03-05 | target-ppc: Fix and enable fri[mnpz] | Tom Musta | 1 | -7/+11 |
| 2014-03-05 | target-ppc: Add ISA 2.06 fcfid[u][s] Instructions | Tom Musta | 1 | -9/+19 |
| 2014-03-05 | target-ppc: Add ISA2.06 Float to Integer Instructions | Tom Musta | 1 | -87/+33 |
| 2014-03-05 | target-ppc: Scalar Non-Signalling Conversions | Tom Musta | 1 | -0/+16 |
| 2014-03-05 | target-ppc: Scalar Round to Single Precision | Tom Musta | 1 | -0/+11 |
| 2014-03-05 | target-ppc: VSX Stage 4: Add xscvsxdsp and xscvuxdsp | Tom Musta | 1 | -11/+16 |
| 2014-03-05 | target-ppc: VSX Stage 4: Add Scalar SP Fused Multiply-Adds | Tom Musta | 1 | -29/+53 |
| 2014-03-05 | target-ppc: VSX Stage 4: add xsrsqrtesp | Tom Musta | 1 | -4/+9 |
| 2014-03-05 | target-ppc: VSX Stage 4: Add xssqrtsp | Tom Musta | 1 | -4/+9 |
| 2014-03-05 | target-ppc: VSX Stage 4: Add xsresp | Tom Musta | 1 | -4/+10 |
| 2014-03-05 | target-ppc: VSX Stage 4: Add xsdivsp | Tom Musta | 1 | -4/+9 |
| 2014-03-05 | target-ppc: VSX Stage 4: Add xsmulsp | Tom Musta | 1 | -4/+9 |
| 2014-03-05 | target-ppc: VSX Stage 4: Add xsaddsp and xssubsp | Tom Musta | 1 | -7/+13 |
| 2014-03-05 | target-ppc: Add VSX Rounding Instructions | Tom Musta | 1 | -0/+68 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 Integer Conversion Instructions | Tom Musta | 1 | -0/+107 |
| 2014-03-05 | target-ppc: Add VSX Floating Point to Floating Point Conversion Instructions | Tom Musta | 1 | -0/+46 |
| 2014-03-05 | target-ppc: Add VSX Vector Compare Instructions | Tom Musta | 1 | -0/+57 |
| 2014-03-05 | target-ppc: Add VSX xmax/xmin Instructions | Tom Musta | 1 | -0/+39 |
| 2014-03-05 | target-ppc: Add VSX xscmp*dp Instructions | Tom Musta | 1 | -0/+39 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 Multiply Add Instructions | Tom Musta | 1 | -0/+100 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xtsqrt Instructions | Tom Musta | 1 | -0/+54 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xtdiv Instructions | Tom Musta | 1 | -0/+67 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xrsqrte Instructions | Tom Musta | 1 | -0/+45 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xsqrt Instructions | Tom Musta | 1 | -0/+44 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xre Instructions | Tom Musta | 1 | -0/+35 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xdiv Instructions | Tom Musta | 1 | -0/+49 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xmul Instructions | Tom Musta | 1 | -0/+47 |
| 2014-03-05 | target-ppc: Add VSX ISA2.06 xadd/xsub Instructions | Tom Musta | 1 | -0/+50 |
| 2014-03-05 | target-ppc: General Support for VSX Helpers | Tom Musta | 1 | -0/+41 |
| 2014-03-05 | target-ppc: Add set_fprf Argument to fload_invalid_op_excp() | Tom Musta | 1 | -48/+55 |
| 2013-04-26 | target-ppc: add support for extended mtfsf/mtfsfi forms | Aurelien Jarno | 1 | -10/+7 |
| 2013-04-26 | target-ppc: optimize fabs, fnabs, fneg | Aurelien Jarno | 1 | -31/+0 |
| 2013-04-26 | powerpc: correctly handle fpu exceptions. | Tristan Gingold | 1 | -11/+12 |
| 2013-03-22 | PPC/GDB: handle read and write of fpscr | Fabien Chouteau | 1 | -0/+5 |
| 2012-06-24 | ppc: Add missing break | Blue Swirl | 1 | -0/+1 |
| 2012-06-24 | ppc: Avoid AREG0 for FPU and SPE helpers | Blue Swirl | 1 | -171/+179 |
| 2012-06-24 | ppc: Split FPU and SPE ops | Blue Swirl | 1 | -0/+1731 |
