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path: root/target-ppc/cpu.h
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2016-03-24ppc: A couple more dummy POWER8 Book4 regsBenjamin Herrenschmidt1-0/+3
2016-03-24ppc: Add dummy CIABR SPRBenjamin Herrenschmidt1-0/+1
2016-03-24ppc: Add POWER8 IAMR registerBenjamin Herrenschmidt1-0/+1
2016-03-24ppc: Add dummy SPR_IC for POWER8Benjamin Herrenschmidt1-0/+1
2016-03-24ppc: Create cpu_ppc_set_papr() helperBenjamin Herrenschmidt1-0/+1
2016-03-24ppc: Update SPR definitionsBenjamin Herrenschmidt1-7/+47
2016-03-16ppc: Add a few more P8 PMU SPRsBenjamin Herrenschmidt1-0/+7
2016-03-16ppc: Define the PSPB register on POWER8Thomas Huth1-0/+1
2016-02-23all: Clean up includesPeter Maydell1-1/+0
2016-02-01target-ppc: mcrfs should always update FEX/VX and only clear exception bitsJames Clarke1-0/+6
2016-01-30target-ppc: Make every FPSCR_ macro have a corresponding FP_ macroJames Clarke1-9/+22
2016-01-30target-ppc: Rework SLB page size lookupDavid Gibson1-0/+1
2016-01-30target-ppc: rename and export maybe_bswap_register()Greg Kurz1-0/+1
2016-01-30ppc: Clean up error handling in ppc_set_compat()David Gibson1-1/+1
2015-11-30target-ppc: Move the FPSCR bit update macros to cpu.hMadhavan Srinivasan1-0/+21
2015-11-11ppc: Add/Re-introduce MMU model definitions needed by PR KVMBharata B Rao1-0/+6
2015-10-23ppc/spapr: Add "ibm,pa-features" property to the device-treeBenjamin Herrenschmidt1-0/+1
2015-10-23ppc: Add mmu_model defines for arch 2.03 and 2.07Benjamin Herrenschmidt1-5/+5
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson1-1/+0
2015-09-25ppc: Rename ELF_MACHINE to be PPC specificPeter Crosthwaite1-2/+2
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt1-1/+1
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite1-1/+1
2015-04-28Convert (ffs(val) - 1) to ctz32(val)Stefan Hajnoczi1-2/+2
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost1-8/+1
2015-03-09PPC: Introduce the Virtual Time Base (VTB) SPR registerCyril Bur1-0/+1
2015-03-09target-ppc: Use right page size with hash table lookupAneesh Kumar K.V1-0/+1
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell1-2/+0
2015-01-10Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell1-1/+25
2015-01-07target-ppc: Introduce TEXASRU Bit FieldsTom Musta1-0/+20
2015-01-07target-ppc: Introduce Feature Flag for Transactional MemoryTom Musta1-0/+2
2015-01-07target-ppc: Introduce Instruction Type for Transactional MemoryTom Musta1-1/+3
2014-12-23target-ppc: pass DisasContext to SPR generator functionsPaolo Bonzini1-6/+7
2014-11-04target-ppc: Use macros in opcodes table handling codeBharata B Rao1-1/+2
2014-11-04target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64Pierre Mallard1-1/+4
2014-09-25target-ppc: Use cpu_exec_interrupt qom hookRichard Henderson1-1/+0
2014-06-29target-ppc: enable virtio endian ambivalent supportGreg Kurz1-0/+2
2014-06-27target-ppc: Add DFP to Emulated Instructions FlagTom Musta1-1/+1
2014-06-16spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODEAlexey Kardashevskiy1-1/+3
2014-06-16target-ppc: Add POWER8's Event Based Branch (EBB) control SPRsAlexey Kardashevskiy1-0/+7
2014-06-16KVM: target-ppc: Enable TM state migrationAlexey Kardashevskiy1-0/+14
2014-06-16target-ppc: Add POWER8's TM SPRsAlexey Kardashevskiy1-0/+10
2014-06-16target-ppc: Add POWER8's MMCR2/MMCRS SPRsAlexey Kardashevskiy1-0/+3
2014-06-16target-ppc: Add POWER8's FSCR SPRAlexey Kardashevskiy1-0/+16
2014-06-16target-ppc: Add POWER8's TIR SPRAlexey Kardashevskiy1-0/+1
2014-06-16target-ppc: Add HID4 SPR for PPC970Alexey Kardashevskiy1-0/+1
2014-06-16target-ppc: Add PMC7/8 to 970 classAlexey Kardashevskiy1-0/+4
2014-06-16target-ppc: Add "POWER" prefix to MMCRA PMU registersAlexey Kardashevskiy1-1/+2
2014-06-16target-ppc: Copy and split gen_spr_7xx() for 970Alexey Kardashevskiy1-0/+20
2014-06-16target-ppc: Merge 970FX and 970MP into a single 970 classAlexey Kardashevskiy1-0/+5
2014-06-16target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRsAlexey Kardashevskiy1-20/+20
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