| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2014-03-13 | cpu-exec: Change cpu_loop_exit() argument to CPUState | Andreas Färber | 1 | -1/+1 | |
| Signed-off-by: Andreas Färber <afaerber@suse.de> | |||||
| 2014-03-13 | cpu: Move exception_index field from CPU_COMMON to CPUState | Andreas Färber | 1 | -1/+3 | |
| Signed-off-by: Andreas Färber <afaerber@suse.de> | |||||
| 2012-07-27 | target-or32: Add exception support | Jia Liu | 1 | -0/+27 | |
| Add OpenRISC exception support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> | |||||
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index : riscv-gnu-toolchain/qemu.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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