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2014-12-16target-mips: Fix DisasContext's ulri member initializationMaciej W. Rozycki1-1/+1
2014-12-16target-mips: Use local float status pointer across MSA macrosMaciej W. Rozycki1-35/+34
2014-12-16target-mips: Add missing calls to synchronise SoftFloat statusMaciej W. Rozycki4-17/+17
2014-12-16target-mips: Also apply the CP0.Status mask to MTTC0Maciej W. Rozycki1-1/+2
2014-12-16target-mips: gdbstub: Clean up FPU register handlingMaciej W. Rozycki1-19/+19
2014-12-16target-mips: Correct 32-bit address space wrappingMaciej W. Rozycki2-8/+19
2014-12-16target-mips: Tighten ISA level checksMaciej W. Rozycki3-15/+114
2014-12-16target-mips: Fix CP0.Config3.ISAOnExc write accessesMaciej W. Rozycki3-2/+15
2014-12-16target-mips: Output CP0.Config2-5 in the register dumpMaciej W. Rozycki1-0/+4
2014-12-16target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEPMaciej W. Rozycki1-3/+3
2014-12-16target-mips: Correct the writes to Status and Cause registers via gdbstubMaciej W. Rozycki3-86/+102
2014-12-16target-mips: Correct the handling of writes to CP0.Status for MIPSr6Maciej W. Rozycki1-2/+4
2014-12-16target-mips: Correct MIPS16/microMIPS branch size calculationMaciej W. Rozycki1-1/+2
2014-12-16target-mips: Restore the order of helpersMaciej W. Rozycki1-159/+160
2014-12-16target-mips: Remove unused `FLOAT_OP' macroMaciej W. Rozycki1-2/+0
2014-12-16target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpersMaciej W. Rozycki1-1/+1
2014-12-16target-mips: Fix formatting in `decode_opc'Maciej W. Rozycki1-5/+8
2014-12-16target-mips: Fix formatting in `mips_defs'Maciej W. Rozycki1-19/+21
2014-12-16target-mips: Fix formatting in `decode_extended_mips16_opc'Maciej W. Rozycki1-1/+1
2014-12-16target-mips: Enable vectored interrupt support for the 74Kf CPUMaciej W. Rozycki1-1/+1
2014-12-16target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processorsMaciej W. Rozycki1-0/+41
2014-12-16target-mips: Make CP0.Config4 and CP0.Config5 registers signedMaciej W. Rozycki1-4/+4
2014-12-16target-mips: Add 5KEc and 5KEf MIPS64r2 processorsMaciej W. Rozycki1-0/+45
2014-12-16target-mips: Make CP1.FIR read-only here tooMaciej W. Rozycki1-1/+1
2014-12-16target-mips: Correct the handling of register #72 on writesMaciej W. Rozycki1-1/+1
2014-12-15target-mips: kvm: do not use get_clock()Paolo Bonzini1-1/+1
2014-11-07target-mips: fix multiple TCG registers covering same dataYongbok Kim1-5/+3
2014-11-07mips: Ensure PC update with MTC0 single-steppingMaciej W. Rozycki1-1/+1
2014-11-07target-mips: fix for missing delay slot in BC1EQZ and BC1NEZLeon Alrae1-0/+1
2014-11-07mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bitsMaciej W. Rozycki1-3/+5
2014-11-07mips: Add macros for CP0.Config3 and CP0.Config4 bitsMaciej W. Rozycki1-0/+13
2014-11-07mips: Respect CP0.Status.CU1 for microMIPS FP branchesMaciej W. Rozycki1-2/+7
2014-11-03target-mips: add MSA support to mips32r5-genericYongbok Kim1-2/+2
2014-11-03target-mips: add MSA MI10 format instructionsYongbok Kim3-5/+131
2014-11-03target-mips: add MSA 2RF format instructionsYongbok Kim3-0/+621
2014-11-03target-mips: add MSA VEC/2R format instructionsYongbok Kim3-0/+265
2014-11-03target-mips: add MSA 3RF format instructionsYongbok Kim3-0/+1699
2014-11-03target-mips: add MSA ELM format instructionsYongbok Kim3-0/+290
2014-11-03target-mips: add MSA 3R format instructionsYongbok Kim3-0/+963
2014-11-03target-mips: add MSA BIT format instructionsYongbok Kim3-0/+297
2014-11-03target-mips: add MSA I5 format instructionYongbok Kim3-0/+232
2014-11-03target-mips: add MSA I8 format instructionsYongbok Kim3-2/+156
2014-11-03target-mips: add MSA branch instructionsYongbok Kim1-114/+220
2014-11-03target-mips: add msa_helper.cYongbok Kim2-1/+50
2014-11-03target-mips: add msa_reset(), global msa registerYongbok Kim2-0/+90
2014-11-03target-mips: add MSA opcode enumYongbok Kim1-0/+245
2014-11-03target-mips: stop translation after ctc1Yongbok Kim1-0/+6
2014-11-03target-mips: remove duplicated mips/ieee mapping functionYongbok Kim3-9/+6
2014-11-03target-mips: add MSA exceptionsYongbok Kim1-0/+10
2014-11-03target-mips: add MSA defines and data structureYongbok Kim3-2/+52
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