aboutsummaryrefslogtreecommitdiff
path: root/target-mips
AgeCommit message (Collapse)AuthorFilesLines
2007-07-29Fix MIPS cache configuration, by Aurelien Jarno.ths1-11/+19
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11Update TODO list.ths1-2/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3057 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-28Simplify round/ceil/floor implementation, spotted by Fabrice Bellard.ths1-30/+12
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-27Fix computation for ceil, floor and round instructions.ths1-6/+24
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-26Implement recip1/recip2/rsqrt1/rsqrt2.ths2-93/+143
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-25MIPS64 improvements, based on a patch by Aurelien Jarno.ths2-5/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-23Handle MIPS64 SEGBITS value correctly.ths5-16/+32
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22Allow emulation of 32bit targets in the MIPS64 capable qemu version.ths1-2/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22Fix write to K0 bits in Config0, by Aurelien Jarno.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3006 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-12Change 20Kc PRID to a later version.ths1-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-09R5k has PX implemented.ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03Move target-specific defines to the target directories.ths1-0/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03Clean up of some target specifics in exec.c/cpu-exec.c.ths2-12/+19
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-02Check for R2 instructions, and throw RI if we don't emulate R2.ths1-18/+50
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01Update some comments, 64bit FPU support is functional regardless ofths2-5/+8
funny non-standard fcr0 bits on earlier CPUs. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01Make sure hflags are updated for CP0_Status changes.ths1-8/+42
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01Update TODO.ths1-7/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2911 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.ths1-2/+50
Note that the F64 flag isn't usable on any of those (and the R4000), so all our 64bit FPU goodness goes out of the window until a shadow capability flag is implemented. :-( git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01Allow again FPU for usermode emulation.ths1-1/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31Simplify code.ths1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31Don't kill the registered irqs on reset.ths1-3/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31Add proper float*_is_nan prototypes.ths1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2902 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-30Fix CPU (re-)selection on reset.ths2-4/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-29Fix usermode check, thanks Aurelien Jarno.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-29Don't check the FPU state for each FPU instruction, use hflags toths4-126/+126
handle this per-tb. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28Handle PX/UX status flags correctly, by Aurelien Jarno.ths4-7/+48
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28Fix ddivu for 32bit hosts, by Aurelien Jarno.ths1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2890 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28Do not sign extend lwu, by Aurelien Jarno.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2889 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28MIPS64 addressing fixes, by Aurelien Jarno.ths3-9/+81
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-23The 24k wants more watch and srsmap registers.ths4-261/+45
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-23The previous patch to make breakpoints work was a performanceths2-32/+7
disaster, use a similiar hack as ARM does instead. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-20Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions.ths2-10/+31
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-20Fix indexed FP load/store instructions.ths3-41/+31
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19More MIPS 64-bit FPU support.ths4-103/+369
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19Fix slti/sltiu for MIPS64, by Aurelien Jarno.ths2-8/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19Fix ldl/ldr implementation, by Aurelien Jarno.ths1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18- Move FPU exception handling into helper functions, since they are big.ths5-638/+795
- Fix FP-conditional branches. - Check FPU register mode at runtime, not translation time, as the F64 status bit can change. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18Work around the lack of proper handling for self-modifying code.ths2-2/+30
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-16More generic 64 bit multiplication support, by Aurelien Jarno.ths3-18/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13Full MIPS64 MMU implementation, by Aurelien Jarno.ths3-7/+53
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.ths2-120/+72
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13Delete misleading comment.ths1-2/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2814 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13Don't decode CP0 XContext on 32bit MIPS.ths1-4/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13MMU code improvements, by Aurelien Jarno.ths3-18/+24
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2811 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13MIPS linux-user update.ths1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2810 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths8-114/+149
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Implemented cabs FP instructions, and improve exception handling forths2-40/+180
trunc/floor/ceil/round. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Another bit of nicer debug output.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Implement FP madd/msub, wire up bc1any[24][ft].ths2-12/+140
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Improved debug output for the MIPS opcode decoder.ths1-85/+77
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.1 at 2024-10-18 18:00:47 +0000