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AgeCommit message (Expand)AuthorFilesLines
2014-10-14target-mips: add new Floating Point instructionsLeon Alrae3-44/+521
2014-10-14target-mips: add AUI, LSA and PCREL instruction familiesLeon Alrae1-14/+189
2014-10-13target-mips: add compact and CP1 branchesYongbok Kim1-14/+459
2014-10-13target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructionsYongbok Kim3-12/+136
2014-10-13target-mips: Status.UX/SX/KX enable 32-bit address wrappingLeon Alrae2-9/+15
2014-10-13target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6Leon Alrae1-59/+62
2014-10-13target-mips: redefine Integer Multiply and Divide instructionsLeon Alrae1-21/+322
2014-10-13target-mips: move PREF, CACHE, LLD and SCD instructionsLeon Alrae1-1/+28
2014-10-13target-mips: signal RI Exception on DSP and Loongson instructionsLeon Alrae1-97/+98
2014-10-13target-mips: split decode_opc_special* into *_r6 and *_legacyLeon Alrae1-68/+160
2014-10-13target-mips: extract decode_opc_special* from decode_opcLeon Alrae1-805/+845
2014-10-13target-mips: move LL and SC instructionsLeon Alrae1-2/+26
2014-10-13target-mips: add SELEQZ and SELNEZ instructionsLeon Alrae1-2/+16
2014-10-13target-mips: signal RI Exception on instructions removed in R6Leon Alrae1-8/+56
2014-10-13target-mips: define ISA_MIPS64R6Leon Alrae1-9/+19
2014-10-06gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flagPeter Maydell1-0/+1
2014-09-25target-mips: Use cpu_exec_interrupt qom hookRichard Henderson3-0/+19
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova1-0/+3
2014-08-07target-mips: Ignore unassigned accesses with KVMJames Hogan1-0/+11
2014-07-28target-mips/translate.c: Free TCG in OPC_DINSVDongxue Zhang1-0/+3
2014-07-09mips/kvm: Disable FPU on reset with KVMJames Hogan1-0/+7
2014-07-05mips/kvm: Init EBase to correct KSEG0James Hogan1-1/+7
2014-06-20target-mips: copy CP0_Config1 into DisasContextAurelien Jarno1-9/+11
2014-06-20Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell6-13/+758
2014-06-18target-mips: implement UserLocal RegisterPetar Jovanovic4-13/+83
2014-06-18target-mips: Enable KVM support in build systemSanjay Lal1-0/+1
2014-06-18target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset()James Hogan1-0/+8
2014-06-18target-mips: kvm: Add main KVM support for MIPSSanjay Lal2-0/+709
2014-06-18target-mips: get_physical_address: Add KVM awarenessJames Hogan1-7/+26
2014-06-18target-mips: get_physical_address: Add defines for segment basesJames Hogan1-6/+12
2014-06-18target-mips: Reset CPU timer consistentlyJames Hogan1-0/+2
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini2-5/+2
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-14/+0
2014-06-05softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2-1/+1
2014-06-05softmmu: make do_unaligned_access a method of CPUPaolo Bonzini3-6/+8
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson5-12/+5
2014-03-27target-mips: Avoid shifting left into sign bitPeter Maydell4-17/+17
2014-03-25target-mips: fix MTHC1 and MFHC1 when FPU in FR=0 modePetar Jovanovic1-35/+44
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber3-3/+6
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber1-2/+6
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber2-3/+12
2014-03-13translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber1-2/+2
2014-03-13exec: Change tlb_fill() argument to CPUStateAndreas Färber1-3/+4
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber3-3/+4
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber3-20/+24
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber4-11/+16
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2-28/+30
2014-02-10target-mips: add user-mode FR switch support for MIPS32r5Petar Jovanovic4-10/+56
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