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target-mips
Age
Commit message (
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Author
Files
Lines
2011-12-14
Fix spelling in comments, documentation and messages
Stefan Weil
1
-1
/
+1
2011-12-02
fix spelling in target sub directory
Dong Xu Wang
2
-2
/
+2
2011-10-01
softmmu_header: pass CPUState to tlb_fill
Blue Swirl
1
-4
/
+3
2011-09-06
mips: Support the MT TCStatus IXMT irq disable flag
Edgar E. Iglesias
1
-0
/
+4
2011-09-06
mips: Add MT halting and waking of VPEs
Edgar E. Iglesias
2
-4
/
+129
2011-09-06
mips: Initialize MT state at reset
Edgar E. Iglesias
1
-0
/
+26
2011-09-06
mips: Default to using one VPE and one TC.
Edgar E. Iglesias
1
-1
/
+1
2011-09-06
mips: Enable VInt interrupt mode for the 34Kf
Edgar E. Iglesias
1
-1
/
+1
2011-09-06
mips: Correct VInt vector generation
Edgar E. Iglesias
1
-3
/
+3
2011-09-06
mips: Correct IntCtl write mask for VInt
Edgar E. Iglesias
1
-1
/
+1
2011-09-06
mips: Hook in more reg accesses via mttr/mftr
Edgar E. Iglesias
3
-11
/
+225
2011-09-06
mips: Synchronize CP0 TCSTatus, Status and EntryHi
Edgar E. Iglesias
1
-44
/
+106
2011-09-06
mips: Handle TC indexing of other VPEs
Edgar E. Iglesias
1
-105
/
+161
2011-08-20
Use glib memory allocation and free functions
Anthony Liguori
2
-3
/
+3
2011-08-07
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Blue Swirl
3
-5
/
+5
2011-07-30
exec.h cleanup
Blue Swirl
3
-61
/
+57
2011-07-20
Fix unassigned memory access handling
Blue Swirl
2
-4
/
+6
2011-06-26
Remove exec-all.h include directives
Blue Swirl
4
-4
/
+1
2011-06-26
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Blue Swirl
2
-22
/
+24
2011-06-26
exec.h: fix coding style and change cpu_has_work to return bool
Blue Swirl
1
-1
/
+1
2011-06-26
cpu_loop_exit: avoid using AREG0
Blue Swirl
1
-2
/
+2
2011-05-15
target-mips: Fix warning caused by unused local variable
Aurelien Jarno
1
-8
/
+6
2011-05-12
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Anthony Liguori
1
-2
/
+2
2011-05-08
target-mips: Do not check CPU_INTERRUPT_TIMER.
Richard Henderson
1
-4
/
+0
2011-05-08
Fix typos in comments (interupt -> interrupt)
Stefan Weil
1
-1
/
+1
2011-05-06
Fix typo in code and comments
Stefan Weil
1
-1
/
+1
2011-04-20
Remove unused function parameter from cpu_restore_state
Stefan Weil
1
-2
/
+2
2011-04-20
Remove unused function parameters from gen_pc_load and rename the function
Stefan Weil
1
-2
/
+1
2011-04-17
target-mips: clear softfpu exception state for comparison instructions
Aurelien Jarno
1
-16
/
+25
2011-04-17
target-mips: fix c.ps.* instructions
Aurelien Jarno
1
-4
/
+4
2011-04-17
target-mips: don't hardcode softfloat exception bits
Aurelien Jarno
1
-15
/
+20
2011-04-17
target-mips: simplify FP comparisons
Aurelien Jarno
1
-36
/
+36
2011-04-17
softfloat: rename float*_eq() into float*_eq_quiet()
Aurelien Jarno
1
-16
/
+16
2011-04-17
target-mips: use new float*_unordered*() functions
Aurelien Jarno
1
-98
/
+70
2011-04-10
Fix conversions from pointer to tcg_target_long
Stefan Weil
1
-1
/
+1
2011-04-03
Fix trivial "endianness bugs"
Stefan Weil
1
-1
/
+1
2011-03-13
inline cpu_halted into sole caller
Paolo Bonzini
1
-11
/
+0
2011-02-09
[PATCH] [MIPS] Clear softfpu exception state for round, trunc, ceil and floor
Chris Dearman
1
-0
/
+16
2011-01-24
target-mips: fix save_cpu_state() calls
Aurelien Jarno
1
-6
/
+6
2011-01-18
mips: Break TBs after mfc0_count
Edgar E. Iglesias
1
-2
/
+6
2011-01-02
softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()
Peter Maydell
1
-4
/
+4
2010-12-27
target-mips: fix host CPU consumption when guest is idle
Aurelien Jarno
2
-3
/
+23
2010-12-22
target-mips: fix translation of MT instructions
Nathan Froyd
3
-28
/
+16
2010-10-30
target-xxx: Use fprintf_function (format checking)
Stefan Weil
3
-9
/
+8
2010-10-13
mips: avoid write only variables
Blue Swirl
1
-0
/
+29
2010-09-18
MIPS: fix yield handling
Blue Swirl
1
-1
/
+3
2010-08-06
mips: Add support for VInt and VEIC irq modes
Edgar E. Iglesias
2
-0
/
+50
2010-07-31
Correctly identify multiple cpus in SMP systems
Hervé Poussineau
2
-4
/
+2
2010-07-31
Remove unused constant
Hervé Poussineau
1
-4
/
+0
2010-07-25
mips: more fixes to the MIPS interrupt glue logic
Aurelien Jarno
4
-15
/
+21
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