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2007-11-22Optimize the conventional move operation.ths1-0/+6
2007-11-22Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno.ths1-4/+4
2007-11-19Add older 4Km variants.ths1-0/+34
2007-11-18Add strict checking mode for softfp code.pbrook1-4/+4
2007-11-18Fix MIPS64 R2 instructions.ths3-30/+34
2007-11-18Use a valid PRid.ths1-1/+1
2007-11-17Fix int/float inconsistencies.pbrook3-36/+34
2007-11-14Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSPths1-2/+19
2007-11-10added cpu_model parameter to cpu_init()bellard3-29/+23
2007-11-09Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths5-424/+418
2007-11-09Move kernel loader parameters from the cpu state to being board specific.ths1-5/+0
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths9-61/+61
2007-11-08Formatting fix.ths1-1/+1
2007-10-29Adjust s390 addresses (the MSB is defined as "to be ignored").ths1-1/+5
2007-10-29Preliminary MIPS64R2 mode.ths1-0/+21
2007-10-29Fix logic bug which broke TLBL/TLBS handling somewhat.ths1-3/+3
2007-10-29Restrict CP0_PerfCnt to legal values.ths1-1/+1
2007-10-28Implement missing MIPS supervisor mode bits.ths6-35/+49
2007-10-27Add sharable clz/clo inline functions and use them for the mips target.ths3-49/+33
2007-10-26The other half of the mul64 rework. Sorry for the breakage, I committedths1-2/+2
2007-10-24Remove bogus instruction decode.ths1-1/+0
2007-10-24Force proper sign extension for mfc0/mfhc0 on MIPS64.ths1-2/+2
2007-10-23Fix writable length of the index register.ths1-1/+8
2007-10-23Enforce proper sign extension for lwl/lwr on MIPS64.ths1-1/+3
2007-10-23Fix CLO calculation for MIPS64. And a small code cleanup.ths1-5/+5
2007-10-23Use the standard ASE check for MIPS-3D and MT.ths3-93/+80
2007-10-23Switch bc1any* instructions off if no MIPS-3D is implemented.ths1-1/+9
2007-10-20Handle IBE on MIPS properly.ths2-0/+11
2007-10-17Update TODO.ths1-0/+6
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer4-7/+18
2007-10-13Update TODO.ths1-1/+26
2007-10-13Fix off-by-one in address check.ths1-11/+8
2007-10-12Unify '-cpu ?' option.j_mayer1-0/+1
2007-10-09Use always_inline in the MIPS support where applicable.ths4-28/+28
2007-10-09Delete file which should have been removed in the lst commit.ths1-301/+0
2007-10-09Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths4-67/+206
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths11-66/+66
2007-09-30Update TODO.ths1-7/+0
2007-09-29Supervisor mode implementation, by Aurelien Jarno.ths3-34/+46
2007-09-29Less magic constants.ths1-25/+29
2007-09-28Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz.ths1-13/+0
2007-09-27Move get_sp_from_cpustate from cpu.h to target_signal.h.ths1-5/+0
2007-09-27linux-user sigaltstack() syscall, by Thayne Harbaugh.ths1-0/+5
2007-09-26hflags computation cleanup, by Aurelien Jarno.ths3-62/+32
2007-09-26Wrap a few often used tests with unlikely(), by Aurelien Jarno.ths1-6/+6
2007-09-25Timer start/stop implementation, by Aurelien Jarno.ths3-3/+22
2007-09-25Optimise instructions accessing CP0, by Aurelien Jarno.ths4-34/+49
2007-09-24Per-CPU instruction decoding implementation, by Aurelien Jarno.ths6-103/+230
2007-09-23Fix mips usermode emulation.ths1-0/+3
2007-09-20Extend TB flags to 64 bits (Alexander Graf).j_mayer1-1/+1