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target-mips
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Lines
2015-01-20
target-mips: Don't use _raw load/store accessors
Peter Maydell
1
-2
/
+2
2015-01-20
exec.c: Drop TARGET_HAS_ICE define and checks
Peter Maydell
1
-1
/
+0
2015-01-12
kvm: extend kvm_irqchip_add_msi_route to work on s390
Frank Blaschka
1
-0
/
+6
2015-01-03
gen-icount: check cflags instead of use_icount global
Paolo Bonzini
1
-1
/
+1
2015-01-03
translate: check cflags instead of use_icount global
Paolo Bonzini
1
-10
/
+14
2014-12-17
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141216' into staging
Peter Maydell
8
-382
/
+616
2014-12-16
qemu-log: add log category for MMU info
Antony Pavlov
1
-2
/
+4
2014-12-16
target-mips: remove excp_names[] from linux-user as it is unused
Leon Alrae
1
-1
/
+1
2014-12-16
target-mips: convert single case switch into if statement
Leon Alrae
1
-3
/
+1
2014-12-16
target-mips: Fix DisasContext's ulri member initialization
Maciej W. Rozycki
1
-1
/
+1
2014-12-16
target-mips: Use local float status pointer across MSA macros
Maciej W. Rozycki
1
-35
/
+34
2014-12-16
target-mips: Add missing calls to synchronise SoftFloat status
Maciej W. Rozycki
4
-17
/
+17
2014-12-16
target-mips: Also apply the CP0.Status mask to MTTC0
Maciej W. Rozycki
1
-1
/
+2
2014-12-16
target-mips: gdbstub: Clean up FPU register handling
Maciej W. Rozycki
1
-19
/
+19
2014-12-16
target-mips: Correct 32-bit address space wrapping
Maciej W. Rozycki
2
-8
/
+19
2014-12-16
target-mips: Tighten ISA level checks
Maciej W. Rozycki
3
-15
/
+114
2014-12-16
target-mips: Fix CP0.Config3.ISAOnExc write accesses
Maciej W. Rozycki
3
-2
/
+15
2014-12-16
target-mips: Output CP0.Config2-5 in the register dump
Maciej W. Rozycki
1
-0
/
+4
2014-12-16
target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP
Maciej W. Rozycki
1
-3
/
+3
2014-12-16
target-mips: Correct the writes to Status and Cause registers via gdbstub
Maciej W. Rozycki
3
-86
/
+102
2014-12-16
target-mips: Correct the handling of writes to CP0.Status for MIPSr6
Maciej W. Rozycki
1
-2
/
+4
2014-12-16
target-mips: Correct MIPS16/microMIPS branch size calculation
Maciej W. Rozycki
1
-1
/
+2
2014-12-16
target-mips: Restore the order of helpers
Maciej W. Rozycki
1
-159
/
+160
2014-12-16
target-mips: Remove unused `FLOAT_OP' macro
Maciej W. Rozycki
1
-2
/
+0
2014-12-16
target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers
Maciej W. Rozycki
1
-1
/
+1
2014-12-16
target-mips: Fix formatting in `decode_opc'
Maciej W. Rozycki
1
-5
/
+8
2014-12-16
target-mips: Fix formatting in `mips_defs'
Maciej W. Rozycki
1
-19
/
+21
2014-12-16
target-mips: Fix formatting in `decode_extended_mips16_opc'
Maciej W. Rozycki
1
-1
/
+1
2014-12-16
target-mips: Enable vectored interrupt support for the 74Kf CPU
Maciej W. Rozycki
1
-1
/
+1
2014-12-16
target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processors
Maciej W. Rozycki
1
-0
/
+41
2014-12-16
target-mips: Make CP0.Config4 and CP0.Config5 registers signed
Maciej W. Rozycki
1
-4
/
+4
2014-12-16
target-mips: Add 5KEc and 5KEf MIPS64r2 processors
Maciej W. Rozycki
1
-0
/
+45
2014-12-16
target-mips: Make CP1.FIR read-only here too
Maciej W. Rozycki
1
-1
/
+1
2014-12-16
target-mips: Correct the handling of register #72 on writes
Maciej W. Rozycki
1
-1
/
+1
2014-12-15
target-mips: kvm: do not use get_clock()
Paolo Bonzini
1
-1
/
+1
2014-11-07
target-mips: fix multiple TCG registers covering same data
Yongbok Kim
1
-5
/
+3
2014-11-07
mips: Ensure PC update with MTC0 single-stepping
Maciej W. Rozycki
1
-1
/
+1
2014-11-07
target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ
Leon Alrae
1
-0
/
+1
2014-11-07
mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits
Maciej W. Rozycki
1
-3
/
+5
2014-11-07
mips: Add macros for CP0.Config3 and CP0.Config4 bits
Maciej W. Rozycki
1
-0
/
+13
2014-11-07
mips: Respect CP0.Status.CU1 for microMIPS FP branches
Maciej W. Rozycki
1
-2
/
+7
2014-11-03
target-mips: add MSA support to mips32r5-generic
Yongbok Kim
1
-2
/
+2
2014-11-03
target-mips: add MSA MI10 format instructions
Yongbok Kim
3
-5
/
+131
2014-11-03
target-mips: add MSA 2RF format instructions
Yongbok Kim
3
-0
/
+621
2014-11-03
target-mips: add MSA VEC/2R format instructions
Yongbok Kim
3
-0
/
+265
2014-11-03
target-mips: add MSA 3RF format instructions
Yongbok Kim
3
-0
/
+1699
2014-11-03
target-mips: add MSA ELM format instructions
Yongbok Kim
3
-0
/
+290
2014-11-03
target-mips: add MSA 3R format instructions
Yongbok Kim
3
-0
/
+963
2014-11-03
target-mips: add MSA BIT format instructions
Yongbok Kim
3
-0
/
+297
2014-11-03
target-mips: add MSA I5 format instruction
Yongbok Kim
3
-0
/
+232
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