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target-mips
Age
Commit message (
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Author
Files
Lines
2008-12-13
Remove unnecessary trailing newlines
blueswir1
1
-2
/
+0
2008-12-07
MIPS: remove a few warnings
aurel32
1
-4
/
+4
2008-11-30
Common cpu_loop_exit prototype
aurel32
1
-1
/
+0
2008-11-25
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
aliguori
1
-2
/
+2
2008-11-18
Refactor and enhance break/watchpoint API (Jan Kiszka)
aliguori
1
-3
/
+4
2008-11-18
Refactor translation block CPU state handling (Jan Kiszka)
aliguori
1
-0
/
+8
2008-11-18
Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
aliguori
1
-5
/
+7
2008-11-17
TCG variable type checking.
pbrook
3
-1225
/
+1212
2008-11-15
target-mips: avoid tcg internal error in mfc0/dmfc0
aurel32
1
-8
/
+11
2008-11-11
Revert commits 5685 to 5688 committed by mistake
aurel32
1
-0
/
+4
2008-11-11
Don't stop translation for mtc0 compare
aurel32
1
-4
/
+0
2008-11-11
target-mips: gen_compute_branch1()
aurel32
1
-81
/
+41
2008-11-11
target-mips: optimize movc*()
aurel32
1
-48
/
+33
2008-11-11
target-mips: optimize gen_farith()
aurel32
1
-12
/
+12
2008-11-11
target-mips: optimize gen_muldiv()
aurel32
1
-115
/
+47
2008-11-11
target-mips: optimize gen_arith()/gen_arith_imm()
aurel32
1
-46
/
+32
2008-11-11
target-mips: convert bit shuffle ops to TCG
aurel32
3
-76
/
+56
2008-11-11
target-mips: convert bitfield ops to TCG
aurel32
3
-46
/
+41
2008-11-11
target-mips: optimize gen_op_addr_add() (2/2)
aurel32
3
-16
/
+13
2008-11-11
target-mips: optimize gen_op_addr_add() (1/2)
aurel32
1
-10
/
+7
2008-11-11
target-mips: optimize gen_save_pc()
aurel32
1
-5
/
+1
2008-11-11
target-mips: fix mft* helpers/call
aurel32
3
-34
/
+34
2008-11-11
target-mips: fix temporary variable freeing in op_ldst_##insn()
aurel32
1
-1
/
+1
2008-11-04
target-mips: use the new rotr/rotri instructions
aurel32
1
-43
/
+5
2008-10-06
Show size for unassigned accesses (Robert Reif)
blueswir1
2
-2
/
+2
2008-09-22
Use concet TCG instructions in the MIPS target.
ths
1
-24
/
+4
2008-09-21
Fix Xcontext fill, by Here Poussineau.
ths
1
-1
/
+1
2008-09-21
Add concat_i32_i64 op.
pbrook
1
-17
/
+6
2008-09-18
Use TCG registers for most CPU register accesses.
ths
1
-17
/
+52
2008-09-18
Move the active FPU registers into env again, and use more TCG registers
ths
6
-314
/
+330
2008-09-14
MIPS: Fix tlbwi/tlbwr
aurel32
1
-3
/
+9
2008-09-14
MIPS: remove empty cpu_mips_irqctrl_init()
aurel32
1
-1
/
+0
2008-09-14
target-mips: fix warning
aurel32
1
-1
/
+1
2008-09-05
TCG fixes for target-mips
aurel32
1
-26
/
+27
2008-09-02
Build fix for gcc-3.3.
ths
1
-0
/
+4
2008-08-30
Fix some warnings that would be generated by gcc -Wredundant-decls
blueswir1
1
-3
/
+0
2008-08-23
MIPS: don't free TCG temporary variable twice
aurel32
1
-2
/
+0
2008-08-01
Delete unused variable.
ths
1
-1
/
+0
2008-07-23
Use plain standard inline.
ths
2
-11
/
+11
2008-07-23
Less hardcoding of TARGET_USER_ONLY.
ths
6
-390
/
+287
2008-07-21
A bunch of minor code improvements in the MIPS target.
ths
2
-21
/
+10
2008-07-21
Fix logging output for MIPS HI, LO registers, by Stefan Weil.
ths
1
-1
/
+2
2008-07-20
Fix compiler warning, by Stefan Weil.
ths
1
-1
/
+1
2008-07-20
Simplify conditional FP moves.
ths
1
-10
/
+5
2008-07-18
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
ths
1
-7
/
+5
2008-07-09
Use temporary registers for the MIPS FPU emulation.
ths
5
-984
/
+1849
2008-07-05
Fix typo in comment.
ths
1
-1
/
+1
2008-07-05
Change MIPS machine default to Malta.
ths
1
-2
/
+2
2008-07-01
Move interrupt_request and user_mode_only to common cpu state.
pbrook
1
-2
/
+0
2008-07-01
Static'ify some functions, and use standard inline in translate.c.
ths
1
-22
/
+22
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