aboutsummaryrefslogtreecommitdiff
path: root/target-mips
AgeCommit message (Expand)AuthorFilesLines
2009-05-13Include assert.h from qemu-common.hPaul Brook1-1/+0
2009-05-13Replace gcc variadic macro extension with C99 versionBlue Swirl1-3/+3
2009-05-04target-mips: proper sign extension for 'SUBU rd, zero, rt'Aurelien Jarno1-0/+1
2009-05-04target-mips: fix comments about SUB/DSUBAurelien Jarno1-2/+2
2009-04-24qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori1-0/+1
2009-04-24qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori1-2/+8
2009-04-20Enable access to SYNCI_Step register in usermode emulation.pbrook1-0/+2
2009-04-17Revert "target-mips: fix call to check_*() functions"aurel321-24/+12
2009-04-17target-mips: simplify exception generationaurel321-4/+0
2009-04-16target-mips: fix revision r7126aurel321-1/+1
2009-04-16target-mips: fix call to check_*() functionsaurel321-12/+24
2009-04-16target-mips: optimize gen_flt3_ldst()aurel321-4/+4
2009-04-16target-mips: optimize gen_flt_ldst()aurel321-4/+2
2009-04-16Stop translation after a syscall instruciton.pbrook1-0/+1
2009-04-15target-mips: mark zero register as unused.aurel321-0/+1
2009-04-15target-mips: variable names consistencyaurel322-766/+768
2009-04-13target-mips: fix commits 7040 and 7042aurel321-2/+6
2009-04-12target-mips: fix commit 7046aurel321-2/+2
2009-04-11target-mips: don't map zero register as a TCG globalaurel321-1/+1
2009-04-11target-mips: optimize gen_ldst()aurel321-22/+64
2009-04-11target-mips: optimize gen_arith_imm()aurel321-106/+161
2009-04-10target-mips: fix commit r7076aurel321-2/+1
2009-04-10target-mips: optimize gen_movcf_d()aurel321-1/+1
2009-04-10target-mips: optimize a few tcg_temp_free()aurel321-3/+3
2009-04-08target-mips: optimize gen_farith()aurel321-56/+47
2009-04-08target-mips: optimize gen_flt3_arith()aurel321-18/+16
2009-04-08target-mips: optimize gen_flt3_ldst()aurel321-9/+4
2009-04-08target-mips: optimize gen_arith()aurel321-158/+290
2009-04-08target-mips: optimize decode_opc()aurel321-13/+17
2009-04-08target-mips: optimize gen_cp1()aurel321-15/+5
2009-04-08target-mips: optimize gen_cp0()aurel321-27/+5
2009-04-06target-mips: use the TCG_CALL_PURE and TCG_CALL_CONST for some helpersaurel321-4/+4
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel321-4/+3
2009-03-29target-mips: optimize gen_movcf_*()aurel321-51/+23
2009-03-29target-mips: optimize gen_movci()aurel321-15/+17
2009-03-29target-mips: optimize gen_compute_branch1()aurel321-107/+57
2009-03-29target-mips: don't map FP registers as TCG global variablesaurel321-35/+30
2009-03-29target-mips: fix divu instructionaurel321-0/+2
2009-03-29target-mips: optimize write to env->hflagsaurel321-14/+7
2009-03-29target-mips: optimize gen_muldiv()aurel321-123/+115
2009-03-29target-mips: optimize gen_HILO()aurel321-4/+0
2009-03-29target-mips: optimize gen_trap()aurel321-26/+12
2009-03-29target-mips: optimize gen_compute_branch()aurel323-51/+48
2009-03-29target-mips: don't mix result and arguments in gen_op_*aurel321-54/+54
2009-03-29target-mips: gen_bshfl()aurel321-29/+45
2009-03-29target-mips: optimize gen_mul_vr54xx()aurel321-2/+2
2009-03-29target-mips: optimize gen_cl()aurel321-15/+11
2009-03-28target-mips: fix FPU in 64-bit modeaurel321-17/+8
2009-03-28target-mips: implement FPU Flush-To-Zero modeaurel321-0/+5
2009-03-10target-mips: use nor instead of or + notaurel321-2/+1
generated by cgit v1.1 at 2024-12-27 19:04:25 +0000