aboutsummaryrefslogtreecommitdiff
path: root/target-mips
AgeCommit message (Expand)AuthorFilesLines
2008-09-18Use TCG registers for most CPU register accesses.ths1-17/+52
2008-09-18Move the active FPU registers into env again, and use more TCG registersths6-314/+330
2008-09-14MIPS: Fix tlbwi/tlbwraurel321-3/+9
2008-09-14MIPS: remove empty cpu_mips_irqctrl_init()aurel321-1/+0
2008-09-14target-mips: fix warningaurel321-1/+1
2008-09-05TCG fixes for target-mipsaurel321-26/+27
2008-09-02Build fix for gcc-3.3.ths1-0/+4
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir11-3/+0
2008-08-23MIPS: don't free TCG temporary variable twiceaurel321-2/+0
2008-08-01Delete unused variable.ths1-1/+0
2008-07-23Use plain standard inline.ths2-11/+11
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths6-390/+287
2008-07-21A bunch of minor code improvements in the MIPS target.ths2-21/+10
2008-07-21Fix logging output for MIPS HI, LO registers, by Stefan Weil.ths1-1/+2
2008-07-20Fix compiler warning, by Stefan Weil.ths1-1/+1
2008-07-20Simplify conditional FP moves.ths1-10/+5
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths1-7/+5
2008-07-09Use temporary registers for the MIPS FPU emulation.ths5-984/+1849
2008-07-05Fix typo in comment.ths1-1/+1
2008-07-05Change MIPS machine default to Malta.ths1-2/+2
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-2/+0
2008-07-01Static'ify some functions, and use standard inline in translate.c.ths1-22/+22
2008-07-01Delete duplicate code.ths1-3/+0
2008-06-30Spelling fixes, spotted by Stuart Brady.ths1-2/+2
2008-06-30Move CPU save/load registration to common code.pbrook1-0/+2
2008-06-30Make bcond and btarget TCG registers.ths1-73/+43
2008-06-29Remove unnecessary helper arguments, and fix some typos.ths3-21/+31
2008-06-29Add missing file. Fix spelling errors.pbrook1-1/+0
2008-06-29Add instruction counter.pbrook2-0/+57
2008-06-27Avoid unused input arguments which triggered tcg errors. Spotted byths3-28/+30
2008-06-27More efficient target register / TC accesses.ths5-197/+278
2008-06-24Clarify some TODO items.ths1-4/+5
2008-06-24Remove remaining uses of T0 in the MIPS target.ths5-454/+468
2008-06-24T1 is now dead.ths3-7/+1
2008-06-24Reduce use of fixed registers a bit more.ths1-329/+356
2008-06-24Use temporaries instead of fixed registers for some instructions.ths3-303/+408
2008-06-23Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths4-1105/+1130
2008-06-20Delete obsolete file.ths1-21/+0
2008-06-20Delete obsolete file.ths1-269/+0
2008-06-20Delete obsolete prototypes.ths1-21/+0
2008-06-20Convert unaligned load/store to TCG.ths4-65/+364
2008-06-20Convert vr54xx multiply instructions to TCG.ths4-240/+32
2008-06-19Remove now-dead code.ths1-27/+0
2008-06-19Convert remaining MIPS FP instructions to TCG.ths4-363/+426
2008-06-12Switch the standard multiplication instructions to TCG.ths5-94/+166
2008-06-12Switch bitfield instructions and assorted special ops to TCG.ths4-195/+189
2008-06-12TCGify the simplest FP instructions.ths3-52/+14
2008-06-12TCGify a few more instructions.ths5-89/+38
2008-06-11Update TODO list.ths1-0/+5
2008-06-11Call most FP helpers without deroute through op.cths4-364/+154