| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2007-05-13 | Don't decode CP0 XContext on 32bit MIPS. | ths | 1 | -4/+8 |
| 2007-05-13 | MMU code improvements, by Aurelien Jarno. | ths | 3 | -18/+24 |
| 2007-05-13 | MIPS linux-user update. | ths | 1 | -0/+1 |
| 2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths | 8 | -114/+149 |
| 2007-05-11 | Implemented cabs FP instructions, and improve exception handling for | ths | 2 | -40/+180 |
| 2007-05-11 | Another bit of nicer debug output. | ths | 1 | -1/+1 |
| 2007-05-11 | Implement FP madd/msub, wire up bc1any[24][ft]. | ths | 2 | -12/+140 |
| 2007-05-11 | Improved debug output for the MIPS opcode decoder. | ths | 1 | -85/+77 |
| 2007-05-11 | Fix missing status ro mask initialization, thanks Stefan Weil. | ths | 1 | -0/+1 |
| 2007-05-10 | Fix for the scd instruction, by Aurelien Jarno. | ths | 1 | -0/+1 |
| 2007-05-09 | Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno. | ths | 1 | -5/+57 |
| 2007-05-09 | Fix MIPS64 address computation specialcase, by Aurelien Jarno. | ths | 2 | -2/+18 |
| 2007-05-08 | Work around gcc's mips define, spotted by Stefan Weil. | ths | 1 | -12/+12 |
| 2007-05-07 | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths | 9 | -518/+1700 |
| 2007-05-07 | Update TODO. | ths | 1 | -4/+3 |
| 2007-05-07 | Clear BD slot on next exception if appropriate. | ths | 1 | -0/+4 |
| 2007-05-05 | Fix a really stupid bug in the [ls]d[lr] emulation, by Herve Poussineau. | ths | 1 | -3/+3 |
| 2007-04-29 | Kill broken host register definitions, thanks to Paul Brook and Herve | ths | 2 | -13/+4 |
| 2007-04-29 | Revert last checkin. | ths | 1 | -1/+1 |
| 2007-04-29 | Hopefully the final fix for LUI sign extensions. | ths | 1 | -1/+1 |
| 2007-04-28 | Update TODO. | ths | 1 | -0/+9 |
| 2007-04-25 | Next attempt to get the lui sign extension right. | ths | 2 | -3/+2 |
| 2007-04-25 | Fix lui sign extension. | ths | 1 | -1/+1 |
| 2007-04-19 | Update comment. We can't easily adhere to the architecture spec because | ths | 1 | -3/+3 |
| 2007-04-17 | Choose number of TLBs at runtime, by Herve Poussineau. | ths | 6 | -26/+25 |
| 2007-04-16 | Simplify branch likely handling. | ths | 1 | -6/+8 |
| 2007-04-15 | Don't use T2 for INS, it conflicts with branch delay slot handling. | ths | 2 | -6/+6 |
| 2007-04-15 | Fix qemu SIGFPE caused by division-by-zero due to underflow. | ths | 3 | -13/+28 |
| 2007-04-15 | Small code generation optimization. | ths | 1 | -3/+6 |
| 2007-04-15 | Delete unused define. | ths | 1 | -2/+0 |
| 2007-04-14 | Restart interrupts after an exception. | ths | 2 | -9/+33 |
| 2007-04-13 | Nicer Log formatting. | ths | 1 | -1/+1 |
| 2007-04-13 | Another fix for CP0 Cause register handling. | ths | 2 | -2/+2 |
| 2007-04-11 | Make SYNCI_Step and CCRes CPU-specific. | ths | 2 | -3/+16 |
| 2007-04-11 | Throw RI for invalid MFMC0-class instructions. Introduce optional | ths | 2 | -3/+18 |
| 2007-04-11 | Code formatting fix. | ths | 1 | -935/+938 |
| 2007-04-11 | More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may | ths | 2 | -10/+10 |
| 2007-04-09 | Fix CP0_IntCtl handling. | ths | 2 | -2/+6 |
| 2007-04-09 | Proper handling of reserved bits in the context register. | ths | 1 | -1/+1 |
| 2007-04-09 | Mark watchpoint features as unimplemented. | ths | 2 | -3/+9 |
| 2007-04-09 | Catch unaligned sc/scd. | ths | 2 | -0/+10 |
| 2007-04-09 | Fix exception handling cornercase for rdhwr. | ths | 2 | -37/+9 |
| 2007-04-09 | Remove bogus mtc0 handling. | ths | 1 | -10/+0 |
| 2007-04-07 | Unify IRQ handling. | pbrook | 1 | -0/+2 |
| 2007-04-07 | cpu_get_phys_page_debug should return target_phys_addr_t | j_mayer | 1 | -2/+2 |
| 2007-04-07 | Implement prefx. | ths | 1 | -1/+41 |
| 2007-04-07 | Set proper BadVAddress value for unaligned instruction fetch. | ths | 1 | -1/+2 |
| 2007-04-07 | Actually skip over delay slot for a non-taken branch likely. | ths | 1 | -2/+2 |
| 2007-04-07 | Fix ins/ext cornercase. | ths | 1 | -4/+4 |
| 2007-04-06 | Fix handling of ADES exceptions. | ths | 1 | -1/+3 |
