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path: root/target-mips/translate.c
AgeCommit message (Expand)AuthorFilesLines
2012-06-04target-mips: Let cpu_mips_init() return MIPSCPUAndreas Färber1-2/+2
2012-06-04target-mips: Use cpu_reset() in cpu_mips_init()Andreas Färber1-1/+1
2012-05-19mips: Fix BC1ANY[24]F instructionsRichard Sandiford1-4/+4
2012-04-30target-mips: Start QOM'ifying CPU initAndreas Färber1-1/+0
2012-04-30target-mips: QOM'ify CPUAndreas Färber1-1/+3
2012-03-14target-mips: Don't overuse CPUStateAndreas Färber1-178/+178
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
2012-02-28target-mips: Clean includesStefan Weil1-7/+0
2011-09-06mips: Initialize MT state at resetEdgar E. Iglesias1-0/+26
2011-09-06mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias1-0/+86
2011-08-20Use glib memory allocation and free functionsAnthony Liguori1-1/+1
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+1
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
2011-01-24target-mips: fix save_cpu_state() callsAurelien Jarno1-6/+6
2011-01-18mips: Break TBs after mfc0_countEdgar E. Iglesias1-2/+6
2010-12-22target-mips: fix translation of MT instructionsNathan Froyd1-4/+4
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil1-7/+5
2010-10-13mips: avoid write only variablesBlue Swirl1-0/+29
2010-07-31Correctly identify multiple cpus in SMP systemsHervé Poussineau1-2/+1
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno1-2/+10
2010-07-11target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno1-0/+271
2010-07-01target-mips: add Loongson support prefetchAurelien Jarno1-35/+43
2010-07-01target-mips: split load and storeAurelien Jarno1-155/+183
2010-06-30target-mips: fix DINSU instructionAurelien Jarno1-1/+1
2010-06-29target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno1-1/+2
2010-06-09target-mips: Fix compilationStefan Weil1-1/+1
2010-06-09target-mips: microMIPS ASE supportNathan Froyd1-5/+2385
2010-06-09target-mips: mips16 cleanupsNathan Froyd1-7/+17
2010-06-09target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd1-83/+81
2010-06-09target-mips: move FP FMT comments closer to the definitionsAurelien Jarno1-14/+14
2010-06-09target-mips: define constants for magic numbersNathan Froyd1-142/+295
2010-06-08target-mips: break out [ls][wd]c1 and rdhwr insn generationNathan Froyd1-47/+59
2010-05-05target-mips: Remove duplicate CPU log.Richard Henderson1-6/+0
2010-04-09target-mips: Fix format specifiers for fpu_fprintfStefan Weil1-14/+20
2010-04-08target-mips: Fix one more format specifier for cpu_fprintfStefan Weil1-1/+3
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-0/+2
2010-03-04target-mips: use newer logical opsAurelien Jarno1-8/+4
2010-03-02target-mips: use setcond when possibleAurelien Jarno1-77/+20
2010-02-23target-mips: fix ROTR and DROTR by zeroNathan Froyd1-0/+4
2010-02-23target-mips: fix CpU exception for coprocessor 0Nathan Froyd1-1/+1
2010-02-23target-mips: remove useless sign extensionAurelien Jarno1-2/+0
2009-12-13target-mips: fix user-mode emulation startupNathan Froyd1-0/+8
2009-12-13target-mips: add copyright notice for mips16 workNathan Froyd1-0/+1
2009-12-13target-mips: add mips16 instruction decodingNathan Froyd1-9/+1063
2009-12-13target-mips: add enums for MIPS16 opcodesNathan Froyd1-0/+112
2009-12-13target-mips: split out delay slot handlingNathan Froyd1-55/+79
2009-12-13target-mips: add gen_base_offset_addrNathan Froyd1-24/+16
2009-12-13target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd1-7/+8
2009-12-13target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd1-139/+148
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