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path: root/target-mips/op_helper.c
AgeCommit message (Expand)AuthorFilesLines
2014-08-07target-mips: Ignore unassigned accesses with KVMJames Hogan1-0/+11
2014-06-18target-mips: implement UserLocal RegisterPetar Jovanovic1-1/+13
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-5/+1
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-14/+0
2014-06-05softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini1-1/+0
2014-06-05softmmu: make do_unaligned_access a method of CPUPaolo Bonzini1-6/+5
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-1/+1
2014-03-27target-mips: Avoid shifting left into sign bitPeter Maydell1-1/+1
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber1-1/+3
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-2/+9
2014-03-13translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber1-2/+2
2014-03-13exec: Change tlb_fill() argument to CPUStateAndreas Färber1-3/+4
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-3/+6
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber1-1/+2
2014-02-10target-mips: add user-mode FR switch support for MIPS32r5Petar Jovanovic1-3/+38
2014-02-10target-mips: add support for CP0_Config5Petar Jovanovic1-0/+6
2014-02-10target-mips: add support for CP0_Config4Petar Jovanovic1-0/+6
2013-09-03cpu: Use QTAILQ for CPU listAndreas Färber1-6/+4
2013-07-29target-mips: Remove assignment to a variable which is never usedStefan Weil1-1/+0
2013-07-09cpu: Make first_cpu and next_cpu CPUStateAndreas Färber1-13/+12
2013-06-28cpu: Turn cpu_unassigned_access() into a CPUState hookAndreas Färber1-4/+9
2013-03-12cpu: Pass CPUState to cpu_interrupt()Andreas Färber1-4/+4
2013-03-12exec: Pass CPUState to cpu_reset_interrupt()Andreas Färber1-3/+2
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-3/+7
2013-02-23target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson1-12/+0
2013-01-31target-mips: Unfuse {,N}M{ADD,SUB}.fmtRichard Sandiford1-8/+17
2013-01-15exec: Return CPUState from qemu_get_cpu()Andreas Färber1-3/+8
2013-01-15target-mips: Clean up mips_cpu_map_tc() documentationAndreas Färber1-5/+9
2013-01-15cpu: Move nr_{cores,threads} fields to CPUStateAndreas Färber1-3/+5
2013-01-08target-mips: Replace macros by inline functionsStefan Weil1-18/+24
2013-01-01target-mips: Use EXCP_SC rather than a magic number陳韋任 (Wei-Ren Chen)1-3/+2
2013-01-01target-mips: Remove semicolon from macro definitionStefan Weil1-1/+1
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-5/+5
2012-12-16exec: refactor cpu_restore_stateBlue Swirl1-7/+1
2012-10-31target-mips: don't flush extra TLB on permissions upgradeAurelien Jarno1-5/+23
2012-10-31target-mips: fix TLBR wrt SEGMaskAurelien Jarno1-0/+6
2012-10-31target-mips: implement unaligned loads using TCGAurelien Jarno1-142/+0
2012-10-31target-mips: simplify load/store microMIPS helpersAurelien Jarno1-64/+9
2012-10-31target-mips: restore CPU state after an FPU exceptionAurelien Jarno1-90/+95
2012-10-31target-mips: use softfloat constants when possibleAurelien Jarno1-48/+44
2012-10-31target-mips: cleanup float to int conversion helpersAurelien Jarno1-39/+79
2012-10-31target-mips: fix FPU exceptionsAurelien Jarno1-13/+19
2012-10-31target-mips: keep softfloat exception set to 0 between instructionsAurelien Jarno1-63/+10
2012-10-31target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno1-89/+48
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-3/+3
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_sleep()Andreas Färber1-3/+7
2012-10-17target-mips: Pass MIPSCPU to mips_tc_sleep()Andreas Färber1-3/+5
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_is_wfi()Andreas Färber1-4/+8
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