aboutsummaryrefslogtreecommitdiff
path: root/target-mips/op_helper.c
AgeCommit message (Expand)AuthorFilesLines
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths1-11/+9
2007-04-15Fix qemu SIGFPE caused by division-by-zero due to underflow.ths1-0/+11
2007-04-15Delete unused define.ths1-2/+0
2007-04-13Nicer Log formatting.ths1-1/+1
2007-04-06Save state for all CP0 instructions, they may throw a CPU exception.ths1-11/+27
2007-04-05Fix rotr immediate ops, mask shift/rotate arguments to their allowedths1-4/+2
2007-04-02Build fix for 64bit machines. (This is still not correct mul/div handling.)ths1-6/+12
2007-04-01Actually enable 64bit configuration.ths1-3/+3
2007-04-01MIPS64 configurations.ths1-2/+0
2007-03-30Sanitize mips exception handling.ths1-3/+5
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths1-2/+7
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths1-2/+0
2007-02-20Replace TLSZ with TARGET_FMT_lx.ths1-3/+3
2007-02-18Fix sign-extension of VPN field in TLB, by Herve Poussineau.ths1-1/+1
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths1-0/+5
2007-01-23Implementing dmfc/dmtc.ths1-6/+6
2007-01-22Fix PageMask handling, second part.ths1-0/+2
2007-01-21Bring TLB / PageSize handling in line with real hardware behaviour.ths1-8/+0
2007-01-03moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr...bellard1-45/+3
2007-01-01Simplify code and fix formatting.ths1-6/+6
2006-12-21Scrap SIGN_EXTEND32.ths1-6/+6
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths1-16/+130
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths1-3/+3
2006-12-06Dynamically translate MIPS mtc0 instructions.ths1-216/+31
2006-12-06Dynamically translate MIPS mfc0 instructions.ths1-143/+15
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths1-6/+48
2006-11-12Avoid redundant TLB flushes (Daniel Jacobowitz).pbrook1-0/+9
2006-06-26consistent update of ERL and EXLbellard1-4/+0
2006-06-14MIPS FPU support (Marius Goeger)bellard1-0/+41
2006-05-22fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)bellard1-2/+2
2006-05-22cosmetics (Thiemo Seufer)bellard1-10/+7
2006-04-23removed unnecessary headerbellard1-1/+0
2006-03-11Avoid flushing of global TLB entries for differing ASIDs (Thiemo Seufer).pbrook1-2/+3
2006-03-11e bitfields in mips TLB structures (Thiemo Seufer).pbrook1-30/+22
2005-12-05MIPS fixes (Daniel Jacobowitz)bellard1-4/+54
2005-11-26mips user emulationbellard1-0/+33
2005-07-04correct split between helper.c and op_helper.c - cosmeticsbellard1-14/+55
2005-07-02use MIPS_TLB_NB constant (Ralf Baechle)bellard1-5/+7
2005-07-02use mask in C0_status (Ralf Baechle)bellard1-1/+1
2005-07-02fixed C0 status codes (Ralf Baechle)bellard1-3/+3
2005-07-02soft irq are just irqs (Ralf Baechle)bellard1-1/+1
2005-07-02MIPS target (Jocelyn Mayer)bellard1-0/+634