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path: root/target-mips/helper.h
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2013-01-31target-mips: implement DSP (d)append sub-class with TCGAurelien Jarno1-13/+0
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-2/+2
2012-10-31target-mips: implement unaligned loads using TCGAurelien Jarno1-4/+0
2012-10-31target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno1-4/+4
2012-10-31target-mips: Add ASE DSP accumulator instructionsJia Liu1-0/+35
2012-10-31target-mips: Add ASE DSP compare-pick instructionsJia Liu1-0/+52
2012-10-31target-mips: Add ASE DSP bit/manipulation instructionsJia Liu1-0/+7
2012-10-31target-mips: Add ASE DSP multiply instructionsJia Liu1-0/+91
2012-10-31target-mips: Add ASE DSP GPR-based shift instructionsJia Liu1-0/+38
2012-10-31target-mips: Add ASE DSP arithmetic instructionsJia Liu1-0/+126
2012-10-28target-mips: rename helper flagsAurelien Jarno1-53/+53
2012-09-19target-mips: Implement Loongson Multimedia InstructionsRichard Henderson1-0/+59
2012-09-15target-mips: switch to AREG0 free modeBlue Swirl1-202/+208
2012-03-24target-mips: Add compiler attribute to some functions which don't returnStefan Weil1-2/+2
2011-09-06mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias1-0/+10
2010-12-22target-mips: fix translation of MT instructionsNathan Froyd1-4/+4
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno1-1/+0
2010-06-09target-mips: microMIPS ASE supportNathan Froyd1-0/+9
2009-11-30target-mips: use physical address in lladdrAurelien Jarno1-0/+9
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno1-0/+1
2009-04-06target-mips: use the TCG_CALL_PURE and TCG_CALL_CONST for some helpersaurel321-4/+4
2009-03-08target-mips: rename helpers from do_ to helper_aurel321-5/+0
2008-11-17TCG variable type checking.pbrook1-197/+203
2008-11-11target-mips: convert bit shuffle ops to TCGaurel321-7/+0
2008-11-11target-mips: convert bitfield ops to TCGaurel321-5/+1
2008-11-11target-mips: fix mft* helpers/callaurel321-5/+5
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths1-2/+4
2008-07-09Use temporary registers for the MIPS FPU emulation.ths1-44/+62
2008-06-29Remove unnecessary helper arguments, and fix some typos.ths1-5/+5
2008-06-27Avoid unused input arguments which triggered tcg errors. Spotted byths1-6/+6
2008-06-24Remove remaining uses of T0 in the MIPS target.ths1-33/+33
2008-06-24Use temporaries instead of fixed registers for some instructions.ths1-4/+4
2008-06-23Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths1-150/+150
2008-06-20Convert unaligned load/store to TCG.ths1-0/+11
2008-06-20Convert vr54xx multiply instructions to TCG.ths1-0/+15
2008-06-19Convert remaining MIPS FP instructions to TCG.ths1-0/+7
2008-06-12Switch the standard multiplication instructions to TCG.ths1-0/+2
2008-06-12Switch bitfield instructions and assorted special ops to TCG.ths1-0/+19
2008-06-12TCGify a few more instructions.ths1-0/+4
2008-06-11Call most FP helpers without deroute through op.cths1-0/+72
2008-06-09Switch remaining CP0 instructions to TCG or helper functions.ths1-0/+118
2008-06-08Register helper functions.ths1-7/+13
2008-05-21Switch MIPS clo/clz and the condition tests to TCG.ths1-0/+5
2008-05-18Add file left out from previous commit.ths1-0/+3
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