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target-mips
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helper.c
Age
Commit message (
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Author
Files
Lines
2014-03-27
target-mips: Avoid shifting left into sign bit
Peter Maydell
1
-4
/
+4
2014-03-13
cputlb: Change tlb_set_page() argument to CPUState
Andreas Färber
1
-1
/
+1
2014-03-13
cputlb: Change tlb_flush_page() argument to CPUState
Andreas Färber
1
-2
/
+6
2014-03-13
cpu: Move exception_index field from CPU_COMMON to CPUState
Andreas Färber
1
-14
/
+17
2014-03-13
cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook
Andreas Färber
1
-6
/
+9
2013-08-28
target-mips: fix get_physical_address() #if 0 build error
James Hogan
1
-1
/
+1
2013-07-23
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Andreas Färber
1
-2
/
+5
2013-07-09
log: Change log_cpu_state[_mask]() argument to CPUState
Andreas Färber
1
-1
/
+1
2013-05-20
linux-user: Save the correct resume address for MIPS signal handling
Kwok Cheung Yeung
1
-2
/
+2
2013-03-12
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
Andreas Färber
1
-2
/
+3
2012-10-31
target-mips: Add ASE DSP resources access check
Jia Liu
1
-0
/
+3
2012-10-23
Rename target_phys_addr_t to hwaddr
Avi Kivity
1
-9
/
+9
2012-06-04
target-mips: Use cpu_reset() in do_interrupt()
Andreas Färber
1
-1
/
+2
2012-03-14
target-mips: Don't overuse CPUState
Andreas Färber
1
-12
/
+12
2012-03-14
Rename cpu_reset() to cpu_state_reset()
Andreas Färber
1
-1
/
+1
2011-12-14
Fix spelling in comments, documentation and messages
Stefan Weil
1
-1
/
+1
2011-09-06
mips: Correct VInt vector generation
Edgar E. Iglesias
1
-3
/
+3
2011-08-07
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Blue Swirl
1
-3
/
+3
2011-06-26
Remove exec-all.h include directives
Blue Swirl
1
-1
/
+0
2011-05-15
target-mips: Fix warning caused by unused local variable
Aurelien Jarno
1
-8
/
+6
2010-08-06
mips: Add support for VInt and VEIC irq modes
Edgar E. Iglesias
1
-0
/
+27
2010-07-17
target-mips: fix xtlb exception for loongson
Aurelien Jarno
1
-2
/
+4
2010-06-09
target-mips: add microMIPS exception handler support
Nathan Froyd
1
-6
/
+15
2010-03-17
Large page TLB flush
Paul Brook
1
-3
/
+4
2010-03-12
Target specific usermode cleanup
Paul Brook
1
-1
/
+4
2010-03-12
Remove cpu_get_phys_page_debug from userspace emulation
Paul Brook
1
-4
/
+2
2010-02-06
target-mips: don't call cpu_loop_exit() from helper.c
Aurelien Jarno
1
-4
/
+4
2009-12-13
target-mips: change interrupt bits to be mips16-aware
Nathan Froyd
1
-21
/
+30
2009-11-30
target-mips: add a function to do virtual -> physical translations
Aurelien Jarno
1
-0
/
+23
2009-11-30
target-mips: split code raising MMU exception in a separate function
Aurelien Jarno
1
-46
/
+53
2009-11-22
target-mips: fix physical address type in MMU functions
Aurelien Jarno
1
-7
/
+7
2009-10-01
Revert "Get rid of _t suffix"
Anthony Liguori
1
-3
/
+3
2009-10-01
Get rid of _t suffix
malc
1
-3
/
+3
2009-09-30
target-mips: unmatched brackets in if 0
Michael S. Tsirkin
1
-1
/
+0
2009-07-16
Update to a hopefully more future proof FSF address
Blue Swirl
1
-2
/
+1
2009-05-13
Include assert.h from qemu-common.h
Paul Brook
1
-1
/
+0
2009-01-15
Convert references to logfile/loglevel to use qemu_log*() macros
aliguori
1
-25
/
+14
2009-01-14
target-mips: fix indentation
aurel32
1
-19
/
+19
2009-01-12
target-mips: get rid of tests on env->user_mode_only
aurel32
1
-220
/
+223
2009-01-04
Update FSF address in GPL/LGPL boilerplate
aurel32
1
-1
/
+1
2008-12-20
Fix remaining compiler warnings for mips targets.
ths
1
-4
/
+0
2008-09-21
Fix Xcontext fill, by Here Poussineau.
ths
1
-1
/
+1
2008-07-23
Less hardcoding of TARGET_USER_ONLY.
ths
1
-221
/
+215
2008-06-27
More efficient target register / TC accesses.
ths
1
-15
/
+15
2008-03-29
Fix infinite loop when invalidating TLB, by Herve Poussineau.
ths
1
-1
/
+1
2008-01-04
Handle some more exception types.
ths
1
-29
/
+43
2008-01-03
Fix exception debug output.
ths
1
-39
/
+36
2007-12-26
De-cruft exception definitions, and implement nicer debug output.
ths
1
-11
/
+53
2007-12-25
Improved PABITS handling, and config register fixes.
ths
1
-3
/
+2
2007-11-22
Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno.
ths
1
-4
/
+4
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