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path: root/target-mips/exec.h
AgeCommit message (Expand)AuthorFilesLines
2008-06-09Switch remaining CP0 instructions to TCG or helper functions.ths1-34/+1
2008-05-18Switch most MIPS logical and arithmetic instructions to TCG.ths1-2/+0
2008-05-07Delete redundant prototype.ths1-2/+0
2008-05-06Use TCG for MIPS GPR moves.ths1-2/+2
2008-05-04Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths1-4/+2
2008-01-09Fix typo which broke MIPS32R2 64-bit FPU support.ths1-1/+1
2007-12-30MIPS COP1X (and related) instructions, by Richard Sandiford.ths1-2/+16
2007-12-25Support for VR5432, and some of its special instructions. Original patchths1-0/+14
2007-11-09Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths1-6/+0
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths1-3/+3
2007-10-28Implement missing MIPS supervisor mode bits.ths1-8/+4
2007-10-27Add sharable clz/clo inline functions and use them for the mips target.ths1-0/+2
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-1/+1
2007-10-09Use always_inline in the MIPS support where applicable.ths1-4/+4
2007-10-09Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths1-30/+0
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths1-5/+5
2007-09-29Supervisor mode implementation, by Aurelien Jarno.ths1-4/+9
2007-09-26hflags computation cleanup, by Aurelien Jarno.ths1-1/+25
2007-09-25Timer start/stop implementation, by Aurelien Jarno.ths1-0/+2
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-2/+2
2007-09-06Partial support for 34K multithreading, not functional yet.ths1-19/+20
2007-06-03Clean up of some target specifics in exec.c/cpu-exec.c.ths1-8/+19
2007-05-19More MIPS 64-bit FPU support.ths1-46/+50
2007-05-18- Move FPU exception handling into helper functions, since they are big.ths1-0/+71
2007-05-16More generic 64 bit multiplication support, by Aurelien Jarno.ths1-2/+0
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths1-5/+1
2007-05-07MIPS 64-bit FPU support, plus some collateral bugfixes in theths1-0/+6
2007-04-29Kill broken host register definitions, thanks to Paul Brook and Herveths1-11/+4
2007-04-15Fix qemu SIGFPE caused by division-by-zero due to underflow.ths1-1/+6
2007-04-01Actually enable 64bit configuration.ths1-4/+4
2007-03-31Malta CBUS UART support.ths1-1/+1
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths1-0/+1
2007-03-19SPARC host fixes, by Ben Taylor.ths1-10/+0
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths1-2/+0
2007-02-02Sparc arm/mips/sparc register patch, by Martin Bochnig.ths1-0/+10
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths1-0/+1
2007-01-03moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr...bellard1-0/+1
2006-12-23Use memory barriers in FORCE_RET / RETURN.ths1-2/+2
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths1-1/+47
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths1-0/+1
2006-12-06Dynamically translate MIPS mtc0 instructions.ths1-1/+2
2006-12-06Dynamically translate MIPS mfc0 instructions.ths1-1/+2
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths1-0/+1
2006-06-14MIPS FPU support (Marius Goeger)bellard1-6/+20
2006-03-11Add missing function prototype.pbrook1-0/+2
2005-12-17disable debug modebellard1-1/+1
2005-12-05MIPS fixes (Daniel Jacobowitz)bellard1-12/+13
2005-10-30moved common softmmu code to common header (Paul Brook)bellard1-65/+1
2005-07-07compilation fixbellard1-5/+0
2005-07-04correct split between helper.c and op_helper.c - cosmeticsbellard1-12/+0