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path: root/target-mips/exec.h
AgeCommit message (Expand)AuthorFilesLines
2007-05-07MIPS 64-bit FPU support, plus some collateral bugfixes in theths1-0/+6
2007-04-29Kill broken host register definitions, thanks to Paul Brook and Herveths1-11/+4
2007-04-15Fix qemu SIGFPE caused by division-by-zero due to underflow.ths1-1/+6
2007-04-01Actually enable 64bit configuration.ths1-4/+4
2007-03-31Malta CBUS UART support.ths1-1/+1
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths1-0/+1
2007-03-19SPARC host fixes, by Ben Taylor.ths1-10/+0
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths1-2/+0
2007-02-02Sparc arm/mips/sparc register patch, by Martin Bochnig.ths1-0/+10
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths1-0/+1
2007-01-03moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr...bellard1-0/+1
2006-12-23Use memory barriers in FORCE_RET / RETURN.ths1-2/+2
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths1-1/+47
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths1-0/+1
2006-12-06Dynamically translate MIPS mtc0 instructions.ths1-1/+2
2006-12-06Dynamically translate MIPS mfc0 instructions.ths1-1/+2
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths1-0/+1
2006-06-14MIPS FPU support (Marius Goeger)bellard1-6/+20
2006-03-11Add missing function prototype.pbrook1-0/+2
2005-12-17disable debug modebellard1-1/+1
2005-12-05MIPS fixes (Daniel Jacobowitz)bellard1-12/+13
2005-10-30moved common softmmu code to common header (Paul Brook)bellard1-65/+1
2005-07-07compilation fixbellard1-5/+0
2005-07-04correct split between helper.c and op_helper.c - cosmeticsbellard1-12/+0
2005-07-02MIPS target (Jocelyn Mayer)bellard1-0/+183