Age | Commit message (Expand) | Author | Files | Lines |
2010-06-09 | target-mips: add microMIPS exception handler support | Nathan Froyd | 1 | -0/+1 |
2010-03-12 | Target specific usermode cleanup | Paul Brook | 1 | -1/+10 |
2010-02-06 | target-mips: don't call cpu_loop_exit() from helper.c | Aurelien Jarno | 1 | -2/+2 |
2009-12-13 | target-mips: add new HFLAGs for JALX and 16/32-bit delay slots | Nathan Froyd | 1 | -19/+28 |
2009-11-30 | target-mips: add a function to do virtual -> physical translations | Aurelien Jarno | 1 | -0/+2 |
2009-11-22 | target-mips: fix physical address type in MMU functions | Aurelien Jarno | 1 | -4/+4 |
2009-11-22 | target-mips: make CP0_LLAddr register CPU dependent | Aurelien Jarno | 1 | -0/+2 |
2009-11-22 | target-mips: rename CP0_LLAddr into lladdr | Aurelien Jarno | 1 | -1/+1 |
2009-11-14 | mips: fix cpu_reset memory leak | Blue Swirl | 1 | -2/+3 |
2009-10-01 | Revert "Get rid of _t suffix" | Anthony Liguori | 1 | -8/+9 |
2009-10-01 | Get rid of _t suffix | malc | 1 | -9/+8 |
2009-08-24 | cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal | Nathan Froyd | 1 | -0/+1 |
2009-07-27 | rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN | Juan Quintela | 1 | -1/+1 |
2009-07-27 | change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION} | Juan Quintela | 1 | -1/+1 |
2009-07-09 | MIPS atomic instructions | Paul Brook | 1 | -0/+5 |
2009-07-09 | MIPS usermode TLS register | Paul Brook | 1 | -0/+5 |
2009-03-29 | target-mips: optimize gen_compute_branch() | aurel32 | 1 | -1/+1 |
2009-03-08 | target-mips: rename helpers from do_ to helper_ | aurel32 | 1 | -8/+8 |
2009-03-07 | The _exit syscall is used for both thread termination in NPTL applications, | pbrook | 1 | -1/+2 |
2008-12-20 | Fix remaining compiler warnings for mips targets. | ths | 1 | -1/+18 |
2008-11-18 | Refactor translation block CPU state handling (Jan Kiszka) | aliguori | 1 | -0/+8 |
2008-11-18 | Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) | aliguori | 1 | -5/+7 |
2008-11-11 | target-mips: optimize gen_op_addr_add() (2/2) | aurel32 | 1 | -6/+7 |
2008-10-06 | Show size for unassigned accesses (Robert Reif) | blueswir1 | 1 | -1/+1 |
2008-09-18 | Move the active FPU registers into env again, and use more TCG registers | ths | 1 | -4/+7 |
2008-07-23 | Less hardcoding of TARGET_USER_ONLY. | ths | 1 | -8/+1 |
2008-07-09 | Use temporary registers for the MIPS FPU emulation. | ths | 1 | -7/+1 |
2008-07-01 | Move interrupt_request and user_mode_only to common cpu state. | pbrook | 1 | -2/+0 |
2008-06-30 | Move CPU save/load registration to common code. | pbrook | 1 | -0/+2 |
2008-06-29 | Add instruction counter. | pbrook | 1 | -0/+6 |
2008-06-27 | More efficient target register / TC accesses. | ths | 1 | -37/+40 |
2008-06-24 | Remove remaining uses of T0 in the MIPS target. | ths | 1 | -3/+0 |
2008-06-24 | T1 is now dead. | ths | 1 | -1/+0 |
2008-06-11 | Move FP TNs to cpu env. | ths | 1 | -5/+6 |
2008-05-30 | Fix typo. | pbrook | 1 | -1/+1 |
2008-05-30 | Move clone() register setup to target specific code. Handle fork-like clone. | pbrook | 1 | -0/+10 |
2008-05-29 | Push common interrupt variables to cpu-defs.h (Glauber Costa) | bellard | 1 | -2/+0 |
2008-05-28 | moved halted field to CPU_COMMON | bellard | 1 | -2/+0 |
2008-05-28 | Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford. | ths | 1 | -0/+1 |
2008-05-06 | Use TCG for MIPS GPR moves. | ths | 1 | -0/+1 |
2008-05-04 | Simplify mips branch handling. Retire T2 from use. Use TCG for branches. | ths | 1 | -1/+0 |
2008-02-12 | Make MIPS MT implementation more cache friendly. | ths | 1 | -4/+4 |
2007-12-30 | MIPS COP1X (and related) instructions, by Richard Sandiford. | ths | 1 | -7/+11 |
2007-12-26 | De-cruft exception definitions, and implement nicer debug output. | ths | 1 | -15/+12 |
2007-12-25 | Improved PABITS handling, and config register fixes. | ths | 1 | -0/+2 |
2007-11-10 | added cpu_model parameter to cpu_init() | bellard | 1 | -4/+2 |
2007-11-09 | Move kernel loader parameters from the cpu state to being board specific. | ths | 1 | -5/+0 |
2007-10-28 | Implement missing MIPS supervisor mode bits. | ths | 1 | -10/+16 |
2007-10-20 | Handle IBE on MIPS properly. | ths | 1 | -0/+3 |
2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer | 1 | -0/+11 |