aboutsummaryrefslogtreecommitdiff
path: root/target-mips/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-7/+0
2013-07-09linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell1-13/+0
2013-06-28cpu: Turn cpu_unassigned_access() into a CPUState hookAndreas Färber1-2/+3
2013-05-20linux-user: Save the correct resume address for MIPS signal handlingKwok Cheung Yeung1-0/+1
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-1/+0
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-2/+2
2013-03-05mips-linux-user: Save and restore fpu and dsp from sigcontextRichard Henderson1-0/+3
2013-02-16target-mips: Move TCG initialization to MIPSCPU initfnAndreas Färber1-0/+1
2013-01-08target-mips: Allow DSP access to be disabled once enabled.Eric Johnson1-1/+1
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-3/+3
2012-11-01Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori1-5/+6
2012-10-31target-mips: Add ASE DSP resources access checkJia Liu1-2/+21
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-5/+6
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-6/+6
2012-09-15target-mips: switch to AREG0 free modeBlue Swirl1-8/+8
2012-09-08MIPS/user: Fix reset CPU state initializationMaciej W. Rozycki1-0/+49
2012-06-04Kill off cpu_state_reset()Andreas Färber1-0/+3
2012-06-04target-mips: Let cpu_mips_init() return MIPSCPUAndreas Färber1-2/+10
2012-05-12target-mips: Remove commented-out function declarationAndreas Färber1-1/+0
2012-05-01Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpuBlue Swirl1-0/+2
2012-04-30target-mips: QOM'ify CPUAndreas Färber1-0/+2
2012-04-28target-mips: Move definition of uint_fast{8, 16}_t to osdep.hAndreas Färber1-7/+0
2012-04-07Replace Qemu by QEMU in commentsStefan Weil1-1/+1
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-mips: Don't overuse CPUStateAndreas Färber1-20/+20
2011-12-02fix spelling in target sub directoryDong Xu Wang1-1/+1
2011-09-06mips: Support the MT TCStatus IXMT irq disable flagEdgar E. Iglesias1-0/+4
2011-09-06mips: Add MT halting and waking of VPEsEdgar E. Iglesias1-0/+51
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-1/+1
2011-07-30exec.h cleanupBlue Swirl1-0/+2
2011-07-20Fix unassigned memory access handlingBlue Swirl1-2/+2
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl1-0/+24
2011-04-03Fix trivial "endianness bugs"Stefan Weil1-1/+1
2010-12-27target-mips: fix host CPU consumption when guest is idleAurelien Jarno1-0/+8
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil1-1/+2
2010-08-06mips: Add support for VInt and VEIC irq modesEdgar E. Iglesias1-0/+23
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno1-0/+3
2010-07-24mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias1-3/+0
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini1-7/+0
2010-06-09target-mips: add microMIPS exception handler supportNathan Froyd1-0/+1
2010-03-12Target specific usermode cleanupPaul Brook1-1/+10
2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno1-2/+2
2009-12-13target-mips: add new HFLAGs for JALX and 16/32-bit delay slotsNathan Froyd1-19/+28
2009-11-30target-mips: add a function to do virtual -> physical translationsAurelien Jarno1-0/+2
2009-11-22target-mips: fix physical address type in MMU functionsAurelien Jarno1-4/+4
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno1-0/+2
2009-11-22target-mips: rename CP0_LLAddr into lladdrAurelien Jarno1-1/+1
2009-11-14mips: fix cpu_reset memory leakBlue Swirl1-2/+3
generated by cgit v1.1 at 2024-12-26 04:40:55 +0000