Age | Commit message (Expand) | Author | Files | Lines |
2015-10-07 | target-*: Drop cpu_gen_code define | Richard Henderson | 1 | -1/+0 |
2015-10-07 | target-mips: Add delayed branch state to insn_start | Richard Henderson | 1 | -0/+1 |
2015-09-25 | mips: Remove ELF_MACHINE from cpu.h | Peter Crosthwaite | 1 | -2/+0 |
2015-09-18 | target-mips: improve exception handling | Pavel Dovgaluk | 1 | -0/+24 |
2015-09-11 | tlb: Add "ifetch" argument to cpu_mmu_index() | Benjamin Herrenschmidt | 1 | -1/+1 |
2015-08-13 | target-mips: update mips32r5-generic into P5600 | Yongbok Kim | 1 | -1/+1 |
2015-07-09 | cpu-exec: Purge all uses of ENV_GET_CPU() | Peter Crosthwaite | 1 | -1/+1 |
2015-06-12 | target-mips: add MTHC0 and MFHC0 instructions | Leon Alrae | 1 | -0/+1 |
2015-06-12 | target-mips: add CP0.PageGrain.ELPA support | Leon Alrae | 1 | -2/+25 |
2015-06-12 | target-mips: extend selected CP0 registers to 64-bits in MIPS32 | Leon Alrae | 1 | -7/+7 |
2015-06-11 | target-mips: add ERETNC instruction and Config5.LLB bit | Leon Alrae | 1 | -0/+1 |
2015-06-11 | target-mips: add Config5.FRE support allowing Status.FR=0 emulation | Leon Alrae | 1 | -2/+11 |
2015-03-11 | Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150311' into staging | Peter Maydell | 1 | -2/+17 |
2015-03-11 | target-mips: add missing MSACSR and restore fp_status and hflags | Leon Alrae | 1 | -0/+17 |
2015-03-11 | target-mips: replace cpu_save/cpu_load with VMStateDescription | Leon Alrae | 1 | -2/+0 |
2015-03-10 | cpu: Make cpu_init() return QOM CPUState object | Eduardo Habkost | 1 | -8/+1 |
2015-01-20 | exec.c: Drop TARGET_HAS_ICE define and checks | Peter Maydell | 1 | -1/+0 |
2014-12-16 | target-mips: Add missing calls to synchronise SoftFloat status | Maciej W. Rozycki | 1 | -0/+12 |
2014-12-16 | target-mips: Correct 32-bit address space wrapping | Maciej W. Rozycki | 1 | -3/+5 |
2014-12-16 | target-mips: Tighten ISA level checks | Maciej W. Rozycki | 1 | -3/+4 |
2014-12-16 | target-mips: Correct the writes to Status and Cause registers via gdbstub | Maciej W. Rozycki | 1 | -0/+89 |
2014-12-16 | target-mips: Make CP0.Config4 and CP0.Config5 registers signed | Maciej W. Rozycki | 1 | -4/+4 |
2014-11-07 | mips: Add macros for CP0.Config3 and CP0.Config4 bits | Maciej W. Rozycki | 1 | -0/+13 |
2014-11-03 | target-mips: remove duplicated mips/ieee mapping function | Yongbok Kim | 1 | -0/+4 |
2014-11-03 | target-mips: add MSA defines and data structure | Yongbok Kim | 1 | -2/+50 |
2014-11-03 | target-mips: CP0_Status.CU0 no longer allows the user to access CP0 | Leon Alrae | 1 | -1/+2 |
2014-11-03 | target-mips: implement forbidden slot | Leon Alrae | 1 | -1/+2 |
2014-11-03 | target-mips: add Config5.SBRI | Leon Alrae | 1 | -2/+9 |
2014-11-03 | target-mips: update cpu_save/cpu_load to support new registers | Leon Alrae | 1 | -1/+1 |
2014-11-03 | target-mips: add BadInstr and BadInstrP support | Leon Alrae | 1 | -0/+6 |
2014-11-03 | target-mips: add TLBINV support | Leon Alrae | 1 | -0/+7 |
2014-11-03 | target-mips: add new Read-Inhibit and Execute-Inhibit exceptions | Leon Alrae | 1 | -1/+4 |
2014-11-03 | target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} | Leon Alrae | 1 | -0/+4 |
2014-11-03 | target-mips: add RI and XI fields to TLB entry | Leon Alrae | 1 | -0/+11 |
2014-11-03 | target-mips: add KScratch registers | Leon Alrae | 1 | -0/+3 |
2014-10-14 | target-mips: fix broken MIPS16 and microMIPS | Yongbok Kim | 1 | -6/+7 |
2014-10-13 | target-mips: Status.UX/SX/KX enable 32-bit address wrapping | Leon Alrae | 1 | -4/+14 |
2014-06-18 | target-mips: implement UserLocal Register | Petar Jovanovic | 1 | -4/+7 |
2014-06-05 | softmmu: move ALIGNED_ONLY to cpu.h | Paolo Bonzini | 1 | -0/+1 |
2014-03-27 | target-mips: Avoid shifting left into sign bit | Peter Maydell | 1 | -1/+1 |
2014-03-13 | cpu: Move breakpoints field from CPU_COMMON to CPUState | Andreas Färber | 1 | -0/+1 |
2014-03-13 | cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook | Andreas Färber | 1 | -3/+2 |
2014-03-13 | cpu: Turn cpu_has_work() into a CPUClass hook | Andreas Färber | 1 | -28/+0 |
2014-02-10 | target-mips: add support for CP0_Config5 | Petar Jovanovic | 1 | -0/+10 |
2014-02-10 | target-mips: add support for CP0_Config4 | Petar Jovanovic | 1 | -0/+3 |
2013-12-02 | misc: Replace 'struct QEMUTimer' by 'QEMUTimer' | Stefan Weil | 1 | -1/+1 |
2013-07-23 | cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() | Andreas Färber | 1 | -7/+0 |
2013-07-09 | linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user | Peter Maydell | 1 | -13/+0 |
2013-06-28 | cpu: Turn cpu_unassigned_access() into a CPUState hook | Andreas Färber | 1 | -2/+3 |
2013-05-20 | linux-user: Save the correct resume address for MIPS signal handling | Kwok Cheung Yeung | 1 | -0/+1 |