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target-lm32
Age
Commit message (
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Author
Files
Lines
2013-04-08
hw: move headers to include/
Paolo Bonzini
2
-3
/
+3
2013-03-18
target-lm32: use HELPER() macro
Michael Walle
1
-10
/
+10
2013-03-18
target-lm32: flush tlb after clearing env
Michael Walle
1
-2
/
+2
2013-03-18
target-lm32: remove dead code
Michael Walle
1
-10
/
+0
2013-03-18
target-lm32: fix cmpgui and cmpgeui opcodes
Michael Walle
1
-4
/
+14
2013-03-18
target-lm32: don't log cpu state in translation
Michael Walle
1
-5
/
+0
2013-03-18
target-lm32: fix debug memory access
Michael Walle
1
-1
/
+6
2013-03-12
target-lm32: Update VMStateDescription to LM32CPU
Andreas Färber
4
-14
/
+18
2013-03-12
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
Andreas Färber
4
-2
/
+8
2013-03-12
cpu: Move halted and interrupt_request fields to CPUState
Andreas Färber
2
-4
/
+4
2013-03-03
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
Peter Maydell
1
-2
/
+2
2013-03-03
cpu: Introduce ENV_OFFSET macros
Andreas Färber
1
-0
/
+1
2013-02-23
qemu-log: Remove qemu_log_try_set_file() and its users
Peter Maydell
1
-2
/
+0
2013-02-16
target-lm32: Drop unused cpu_lm32_close() prototype
Andreas Färber
1
-1
/
+0
2013-02-16
cpu: Add CPUArchState pointer to CPUState
Andreas Färber
1
-0
/
+2
2013-02-16
target-lm32: Move TCG initialization to LM32CPU initfn
Andreas Färber
2
-6
/
+6
2013-02-16
target-lm32: Introduce QOM realizefn for LM32CPU
Andreas Färber
3
-4
/
+20
2013-01-15
cpu: Move cpu_index field to CPUState
Andreas Färber
1
-1
/
+1
2012-12-19
misc: move include files to include/qemu/
Paolo Bonzini
2
-2
/
+2
2012-12-19
qom: move include files to include/qom/
Paolo Bonzini
1
-1
/
+1
2012-12-19
exec: move include files to include/exec/
Paolo Bonzini
4
-10
/
+10
2012-12-19
build: kill libdis, move disassemblers to disas/
Paolo Bonzini
1
-1
/
+1
2012-12-16
exec: refactor cpu_restore_state
Blue Swirl
1
-7
/
+1
2012-12-08
TCG: Use gen_opc_instr_start from context instead of global variable.
Evgeny Voevodin
1
-3
/
+3
2012-12-08
TCG: Use gen_opc_icount from context instead of global variable.
Evgeny Voevodin
1
-1
/
+1
2012-12-08
TCG: Use gen_opc_pc from context instead of global variable.
Evgeny Voevodin
1
-2
/
+2
2012-11-17
TCG: Use gen_opc_buf from context instead of global variable.
Evgeny Voevodin
1
-4
/
+5
2012-11-17
TCG: Use gen_opc_ptr from context instead of global variable.
Evgeny Voevodin
1
-5
/
+5
2012-11-10
disas: avoid using cpu_single_env
Blue Swirl
1
-1
/
+1
2012-10-31
cpus: Pass CPUState to [qemu_]cpu_has_work()
Andreas Färber
1
-1
/
+3
2012-10-23
Rename target_phys_addr_t to hwaddr
Avi Kivity
1
-1
/
+1
2012-09-27
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
Richard Henderson
1
-1
/
+1
2012-09-15
target-lm32: switch to AREG0 free mode
Blue Swirl
4
-45
/
+34
2012-06-07
build: move other target-*/ objects to nested Makefile.objs
Paolo Bonzini
1
-1
/
+2
2012-06-07
build: move libobj-y variable to nested Makefile.objs
Paolo Bonzini
1
-1
/
+3
2012-06-07
build: move obj-TARGET-y variables to nested Makefile.objs
Paolo Bonzini
1
-0
/
+1
2012-06-04
Kill off cpu_state_reset()
Andreas Färber
1
-6
/
+0
2012-06-04
target-lm32: Let cpu_lm32_init() return LM32CPU
Andreas Färber
3
-5
/
+13
2012-04-14
Use uintptr_t for various op related functions
Blue Swirl
1
-5
/
+3
2012-04-12
target-lm32: QOM'ify CPU reset
Andreas Färber
2
-10
/
+10
2012-04-12
target-lm32: QOM'ify CPU init
Andreas Färber
2
-3
/
+13
2012-04-12
target-lm32: QOM'ify CPU
Andreas Färber
4
-1
/
+135
2012-03-31
target-lm32: init tcg only if available
Michael Walle
1
-1
/
+1
2012-03-14
target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef
Andreas Färber
1
-2
/
+2
2012-03-14
Rename CPUState -> CPUArchState
Andreas Färber
1
-1
/
+1
2012-03-14
target-lm32: Don't overuse CPUState
Andreas Färber
5
-54
/
+54
2012-03-14
target-lm32/microblaze: Typedef struct CPU{MB,LM32}State
Andreas Färber
1
-0
/
+1
2012-03-14
Rename cpu_reset() to cpu_state_reset()
Andreas Färber
1
-2
/
+2
2012-02-28
target-lm32: Clean includes
Stefan Weil
3
-13
/
+1
2011-10-03
lm32: add missing qemu_init_vcpu() call
Michael Walle
1
-0
/
+1
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