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target-i386
Age
Commit message (
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Author
Files
Lines
2008-06-04
32 bit SVM fixes - INVLPG and INVLPGA updates
bellard
4
-25
/
+47
2008-06-04
EFER loading fixes, including SVME bit
bellard
3
-27
/
+24
2008-06-03
Spelling fixes, by Stefan Weil.
ths
2
-5
/
+5
2008-05-30
kqemu API change - allow use of kqemu with 32 bit QEMU on a 64 bit host
bellard
1
-11
/
+21
2008-05-30
Fix typo.
pbrook
1
-1
/
+1
2008-05-30
Move clone() register setup to target specific code. Handle fork-like clone.
pbrook
1
-0
/
+9
2008-05-29
Push common interrupt variables to cpu-defs.h (Glauber Costa)
bellard
1
-2
/
+0
2008-05-28
moved halted field to CPU_COMMON
bellard
4
-8
/
+6
2008-05-28
force bit 1 in eflags load
bellard
1
-1
/
+1
2008-05-28
SVM rework
bellard
7
-477
/
+383
2008-05-28
consistent naming for i386 TCG helper file
bellard
3
-6396
/
+6396
2008-05-28
variable dynamic translation buffer size
bellard
1
-0
/
+2
2008-05-25
fixed x86_64 regression
bellard
1
-4
/
+4
2008-05-25
transformed TN into temporaries - add local temporaries usage when needed - o...
bellard
4
-266
/
+259
2008-05-25
Fix off-by-one unwinding error.
pbrook
1
-5
/
+0
2008-05-24
Fix A20 debug dumps.
pbrook
1
-2
/
+2
2008-05-24
Fix ARM conditional branch bug.
pbrook
1
-28
/
+25
2008-05-22
use debug_insn_start to have nicer debug traces
bellard
1
-5
/
+2
2008-05-22
proper helper definition registering (all targets must do that)
bellard
3
-353
/
+361
2008-05-22
optimization of shifts by a constant
bellard
1
-4
/
+68
2008-05-22
lahf/sahf cpuid test
bellard
2
-9
/
+6
2008-05-22
cmpxchg8b fix - added cmpxchg16b
bellard
3
-7
/
+47
2008-05-22
cmpxchg 64 bit fix
bellard
1
-4
/
+10
2008-05-22
fxsave/fxrstor 64 bit fix
bellard
1
-2
/
+20
2008-05-21
converted conditional jumps, SET and CMOVx to TCG
bellard
4
-840
/
+421
2008-05-21
converted env access to TCG
bellard
2
-67
/
+32
2008-05-21
convert eflags manipulation insns to TCG
bellard
5
-148
/
+46
2008-05-21
convert remaining segment handling to TCG
bellard
3
-49
/
+38
2008-05-21
converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR
bellard
4
-61
/
+39
2008-05-21
suppressed no longer used ops
bellard
2
-17
/
+0
2008-05-21
converted INTO/CMPXCHG8B to TCG
bellard
4
-20
/
+12
2008-05-21
converted BCD ops to TCG
bellard
2
-38
/
+6
2008-05-21
converted MUL/IMUL to TCG
bellard
3
-133
/
+129
2008-05-18
converted string OPs and LOOP insns to TCG
bellard
3
-294
/
+147
2008-05-18
fixed INC/DEC condition codes
bellard
1
-1
/
+1
2008-05-17
converted sign extension ops to TCG
bellard
2
-76
/
+31
2008-05-17
MONITOR insn address generation fix - converted XLAT to TCG
bellard
2
-40
/
+20
2008-05-17
BSR/BSF TCG conversion
bellard
4
-72
/
+54
2008-05-17
converted bit test operations to TCG
bellard
2
-98
/
+53
2008-05-17
moved eflags computation outside op.c
bellard
4
-293
/
+296
2008-05-17
converted adc, sbb, cmpxchg to TCG
bellard
3
-305
/
+151
2008-05-17
converted condition code supprot to TCG - converted shift ops to TCG
bellard
9
-1132
/
+762
2008-05-15
converted more helpers to TCG - fixed some SVM issues
bellard
10
-485
/
+404
2008-05-13
i386 specific TODO
bellard
1
-0
/
+29
2008-05-12
compilation fix
bellard
1
-1
/
+3
2008-05-12
converted more helpers to TCG
bellard
5
-647
/
+498
2008-05-12
removed unused code
bellard
1
-6
/
+0
2008-05-12
FPU fixes
bellard
1
-11
/
+11
2008-05-12
converted x87 FPU ops to TCG
bellard
5
-945
/
+756
2008-05-12
converted SSE/MMX ops to TCG
bellard
6
-671
/
+715
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