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target-i386
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translate.c
Age
Commit message (
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)
Author
Files
Lines
2009-04-05
Add new command line option -singlestep for tcg single stepping.
aurel32
1
-0
/
+5
2009-04-02
Immediate versions of ro[lr]
malc
1
-1
/
+83
2009-03-13
target-i386: use the new bswap* TCG ops
aurel32
1
-13
/
+3
2009-03-13
tcg: rename bswap_i32/i64 functions
aurel32
1
-3
/
+3
2009-01-15
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
aliguori
1
-3
/
+3
2009-01-15
Convert references to logfile/loglevel to use qemu_log*() macros
aliguori
1
-10
/
+8
2009-01-04
Update FSF address in GPL/LGPL boilerplate
aurel32
1
-1
/
+1
2008-12-13
Fix smsw for x86_64 guest and bigendian host case
malc
1
-0
/
+4
2008-12-10
target-i386: Fix jmp im on x86_64 when executing 32-bit code
aurel32
1
-0
/
+2
2008-12-07
target-i386: fix CVE-2007-1322
aurel32
1
-0
/
+2
2008-11-25
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
aliguori
1
-2
/
+2
2008-11-18
Refactor and enhance break/watchpoint API (Jan Kiszka)
aliguori
1
-3
/
+4
2008-11-17
TCG variable type checking.
pbrook
1
-513
/
+502
2008-10-04
Fix crc32w decoding, fix a constant width in blendvpd.
balrog
1
-4
/
+3
2008-10-04
x86 "popcnt" affects flags.
balrog
1
-0
/
+2
2008-10-04
Implement SSE4.1, SSE4.2 (x86).
balrog
1
-31
/
+300
2008-10-01
x86 pextrw destination operand can be r64.
balrog
1
-1
/
+2
2008-09-25
SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).
balrog
1
-3
/
+5
2008-09-25
Implement x86 SSSE3 instructions.
balrog
1
-2
/
+107
2008-07-18
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
ths
1
-8
/
+7
2008-07-07
fix cvtsq2s[sd] (Juergen Lock)
bellard
1
-2
/
+6
2008-07-05
Re-add static qualifier. Fix annother occurance of "const static".
pbrook
1
-1
/
+1
2008-06-30
Fix rdtsc instruction counting.
pbrook
1
-0
/
+6
2008-06-29
Add instruction counter.
pbrook
1
-4
/
+61
2008-06-18
HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf)
bellard
1
-4
/
+6
2008-06-06
undocumented 0x82 opcode is invalid in 64 bit code
bellard
1
-1
/
+3
2008-06-04
fixed exceptions for cpuid and invlpg
bellard
1
-0
/
+6
2008-06-04
reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworke...
bellard
1
-4
/
+5
2008-06-04
32 bit SVM fixes - INVLPG and INVLPGA updates
bellard
1
-4
/
+8
2008-05-28
SVM rework
bellard
1
-137
/
+101
2008-05-25
fixed x86_64 regression
bellard
1
-4
/
+4
2008-05-25
transformed TN into temporaries - add local temporaries usage when needed - o...
bellard
1
-215
/
+253
2008-05-24
Fix ARM conditional branch bug.
pbrook
1
-28
/
+25
2008-05-22
use debug_insn_start to have nicer debug traces
bellard
1
-5
/
+2
2008-05-22
proper helper definition registering (all targets must do that)
bellard
1
-0
/
+5
2008-05-22
optimization of shifts by a constant
bellard
1
-4
/
+68
2008-05-22
lahf/sahf cpuid test
bellard
1
-2
/
+4
2008-05-22
cmpxchg8b fix - added cmpxchg16b
bellard
1
-5
/
+20
2008-05-22
cmpxchg 64 bit fix
bellard
1
-4
/
+10
2008-05-21
converted conditional jumps, SET and CMOVx to TCG
bellard
1
-392
/
+421
2008-05-21
converted env access to TCG
bellard
1
-32
/
+32
2008-05-21
convert eflags manipulation insns to TCG
bellard
1
-13
/
+29
2008-05-21
convert remaining segment handling to TCG
bellard
1
-9
/
+36
2008-05-21
converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR
bellard
1
-17
/
+23
2008-05-21
suppressed no longer used ops
bellard
1
-6
/
+0
2008-05-21
converted INTO/CMPXCHG8B to TCG
bellard
1
-2
/
+2
2008-05-21
converted BCD ops to TCG
bellard
1
-6
/
+6
2008-05-21
converted MUL/IMUL to TCG
bellard
1
-11
/
+129
2008-05-18
converted string OPs and LOOP insns to TCG
bellard
1
-192
/
+147
2008-05-18
fixed INC/DEC condition codes
bellard
1
-1
/
+1
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