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2015-06-05target-i386: Use correct memory attributes for ioport accessesPaolo Bonzini1-13/+46
In order to do this, stop using the cpu_in*/out* helpers, and instead access address_space_io directly. cpu_in* and cpu_out* remain for usage in the monitor, in qtest, and in Xen. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: move check_io helpers to seg_helper.cPaolo Bonzini1-42/+0
Prepare for adding _kernel accessors there in the next patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-4/+1
This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-1/+1
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber1-1/+3
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber1-4/+3
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-3/+6
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-23target-i386: Move apic_state field from CPUX86State to X86CPUChen Fan1-4/+4
This motion is preparing for refactoring vCPU APIC subsequently. Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-21target-i386: yield to another VCPU on PAUSEPaolo Bonzini1-2/+20
After commit b1bbfe7 (aio / timers: On timer modification, qemu_notify or aio_notify, 2013-08-21) FreeBSD guests report a huge slowdown. The problem shows up as soon as FreeBSD turns out its periodic (~1 ms) tick, but the timers are only the trigger for a pre-existing problem. Before the offending patch, setting a timer did a timer_settime system call. After, setting the timer exits the event loop (which uses poll) and reenters it with a new deadline. This does not cause any slowdown; the difference is between one system call (timer_settime and a signal delivery (SIGALRM) before the patch, and two system calls afterwards (write to a pipe or eventfd + calling poll again when re-entering the event loop). Unfortunately, the exit/enter causes the main loop to grab the iothread lock, which in turns kicks the VCPU thread out of execution. This causes TCG to execute the next VCPU in its round-robin scheduling of VCPUS. When the second VCPU is mostly unused, FreeBSD runs a "pause" instruction in its idle loop which only burns cycles without any progress. As soon as the timer tick expires, the first VCPU runs the interrupt handler but very soon it sets it again---and QEMU then goes back doing nothing in the second VCPU. The fix is to make the pause instruction do "cpu_loop_exit". Cc: Richard Henderson <rth@twiddle.net> Reported-by: Luigi Rizzo <rizzo@iet.unipi.it> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1384948442-24217-1-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-09-03cpu: Use QTAILQ for CPU listAndreas Färber1-1/+1
Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Make first_cpu and next_cpu CPUStateAndreas Färber1-1/+1
Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-15target-i386: fix over 80 chars warningsliguang1-13/+26
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-06-15target-i386/helper: remove EIP macroliguang1-2/+2
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-06-15target-i386/helper: remove EDX macroliguang1-4/+4
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-06-15target-i386/helper: remove ECX macroliguang1-22/+22
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-06-15target-i386/helper: remove EBX macroliguang1-1/+1
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-06-15target-i386/helper: remove EAX macroliguang1-5/+5
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-05-02target-i386: Replace cpuid_*features fields with a feature word arrayEduardo Habkost1-7/+7
This replaces the feature-bit fields on both X86CPU and x86_def_t structs with an array. With this, we will be able to simplify code that simply does the same operation on all feature words (e.g. kvm_check_features_against_host(), filter_features_for_kvm(), add_flagname_to_bitmaps(), CPU feature-bit property lookup/registration, and the proposed "feature-words" property) The following field replacements were made on X86CPU and x86_def_t: (cpuid_)features -> features[FEAT_1_EDX] (cpuid_)ext_features -> features[FEAT_1_ECX] (cpuid_)ext2_features -> features[FEAT_8000_0001_EDX] (cpuid_)ext3_features -> features[FEAT_8000_0001_ECX] (cpuid_)ext4_features -> features[FEAT_C000_0001_EDX] (cpuid_)kvm_features -> features[FEAT_KVM] (cpuid_)svm_features -> features[FEAT_SVM] (cpuid_)7_0_ebx_features -> features[FEAT_7_0_EBX] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-7/+14
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15target-i386: Use switch in check_hw_breakpoints()liguang1-1/+1
Replace an if statement using magic numbers for breakpoint type with a more explicit switch statement. This is to aid readability. Change the return type and force_dr6_update argument type to bool. While at it, fix Coding Style issues (missing braces). Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15target-i386: Define DR7 bit field constantsliguang1-2/+2
Implicit use of dr7 bit field is a little hard to understand, so define constants for them and use them consistently. Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-1/+4
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-08-14x86: switch to AREG0 free modeBlue Swirl1-0/+4
Add an explicit CPUX86State parameter instead of relying on AREG0. Remove temporary wrappers and switch to AREG0 free mode. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for misc helpersBlue Swirl1-41/+36
Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for condition code helpersBlue Swirl1-1/+1
Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off misc helpersBlue Swirl1-0/+603
Move various functions to misc_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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