riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2009-01-29	MTRR support on x86, part 2 (Carl-Daniel Hailfinger)	aliguori	1	-1/+22
	Load and save MTRR state together with machine state. Add support for the MTRRcap MSR which is used by the latest Bochs BIOS and some operating systems. Fix a typo in ext2_feature_name. With this patch, MTRR emulation should be good enough to not trigger any sanity checks in well behaved BIOS/kernel code. Some corner cases for BIOS/firmware usage remain to be implemented, but that can be deferred to another patch. Also, MTRR accesses on hardware not supporting MTRRs should cause #GP. That can be enforced by another patch as well. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6472 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18	x86: Debug register emulation (Jan Kiszka)	aliguori	1	-0/+4
	Built on top of previously enhanced breakpoint/watchpoint support, this patch adds full debug register emulation for the x86 architecture. Many corner cases were considered, and the result was successfully tested inside a Linux guest with gdb, but I won't be surprised if one or two scenarios still behave differently in reality. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5747 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-29	Fix restore of older snapshots for target-i386 on big endian hosts	aliguori	1	-2/+2
	A target_ulong may be 64-bit. Passing it to a function expecting a 32-bit pointer is wrong and unfortunately happens to work for x86. It won't work on big endian hosts though. Change the code to work properly on all hosts. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02	Resurrect the safe part of r5274	blueswir1	1	-2/+2
	git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5401 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29	Fix save/restore regression introduced by r5318	aliguori	1	-1/+1
	sysenter_cs is a u32 and is loaded as a u32. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5351 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25	Revert r5274 which breaks savevm/loadvm	blueswir1	1	-2/+2
	git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5321 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25	SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).	balrog	1	-6/+11
	On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch makes both 64-bit aware and enables them for Intel CPUs. Add cpu save/load for 64-bit wide sysenter variables. Signed-off-by: Alexander Graf <agraf@suse.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5318 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20	Add signed versions of save/load functions	blueswir1	1	-2/+2
	git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01	Move interrupt_request and user_mode_only to common cpu state.	pbrook	1	-3/+4
	Save and restore env->interrupt_request and env->halted. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04	save more CPU state	bellard	1	-4/+36
	git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4669 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04	Correctly save and restore env->a20_mask now that it is a 64-bit	aurel32	1	-2/+6
	variable. Noticed by Erik de Castro Lopo. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4334 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04	remove target ifdefs from vl.c	aurel32	1	-0/+264
	(Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162