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target-i386
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machine.c
Age
Commit message (
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Author
Files
Lines
2015-06-12
migration: Use normal VMStateDescriptions for Subsections
Juan Quintela
1
-49
/
+32
2015-06-05
target-i386: use memory API to implement SMRAM
Paolo Bonzini
1
-0
/
+3
2015-01-26
target-i386: make xmm_regs 512-bit wide
Paolo Bonzini
1
-28
/
+27
2015-01-26
target-i386: use vmstate_offset_sub_array for AVX registers
Paolo Bonzini
1
-12
/
+16
2014-12-15
target-i386: get/set/migrate XSAVES state
Wanpeng Li
1
-0
/
+21
2014-10-24
target-i386: add Intel AVX-512 support
Chao Peng
1
-0
/
+87
2014-09-18
target-i386: update fp status fix
Pavel Dovgalyuk
1
-1
/
+1
2014-08-25
x86: Use common variable range MTRR counts
Alex Williamson
1
-1
/
+1
2014-06-25
target-i386: block migration and savevm if invariant tsc is exposed
Marcelo Tosatti
1
-1
/
+1
2014-06-16
savevm: Remove all the unneeded version_minimum_id_old (x86)
Juan Quintela
1
-38
/
+19
2014-05-21
target-i386: get CPL from SS.DPL
Paolo Bonzini
1
-0
/
+8
2014-04-05
target-i386: reorder fields in cpu/msr_hyperv_hypercall subsection
Paolo Bonzini
1
-1
/
+1
2014-03-13
cputlb: Change tlb_flush() argument to CPUState
Andreas Färber
1
-1
/
+1
2014-03-13
exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argument
Andreas Färber
1
-1
/
+1
2014-03-13
exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argument
Andreas Färber
1
-1
/
+2
2014-02-03
kvm: add support for hyper-v timers
Vadim Rozenfeld
1
-0
/
+22
2014-02-03
kvm: make hyperv vapic assist page migratable
Vadim Rozenfeld
1
-0
/
+22
2014-02-03
kvm: make hyperv hypercall and guest os id MSRs migratable.
Vadim Rozenfeld
1
-0
/
+23
2013-12-12
target-i386: Intel MPX
Liu Jinsong
1
-0
/
+51
2013-09-20
fix steal time MSR vmsd callback to proper opaque type
Marcelo Tosatti
1
-3
/
+3
2013-08-09
kvm: migrate vPMU state
Paolo Bonzini
1
-0
/
+44
2013-07-25
Initialize IA32_FEATURE_CONTROL MSR in reset and migration
Arthur Chunqi Li
1
-0
/
+22
2013-07-23
Fix real mode guest segments dpl value in savevm
Orit Wasserman
1
-0
/
+18
2013-07-23
Fix real mode guest migration
Orit Wasserman
1
-0
/
+18
2013-04-17
target-i386: kvm: save/restore steal time MSR
Marcelo Tosatti
1
-0
/
+21
2013-04-08
hw: move headers to include/
Paolo Bonzini
1
-2
/
+2
2013-03-12
cpu: Move halted and interrupt_request fields to CPUState
Andreas Färber
1
-1
/
+1
2013-03-12
target-i386: Update VMStateDescription to X86CPU
Andreas Färber
1
-108
/
+107
2013-01-15
target-i386: Define DR7 bit field constants
liguang
1
-2
/
+3
2013-01-02
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
Anthony Liguori
1
-0
/
+21
2012-12-19
softmmu: move include files to include/sysemu/
Paolo Bonzini
1
-1
/
+1
2012-12-14
target-i386: Enabling IA32_TSC_ADJUST for QEMU KVM guest VMs
Will Auld
1
-0
/
+21
2012-08-29
kvm: get/set PV EOI MSR
Michael S. Tsirkin
1
-0
/
+21
2012-03-14
target-i386: Don't overuse CPUState
Andreas Färber
1
-90
/
+90
2011-10-24
i386: wire up MSR_IA32_MISC_ENABLE
Avi Kivity
1
-0
/
+21
2011-10-24
kvm: support TSC deadline MSR with subsection
Liu, Jinsong
1
-0
/
+21
2011-10-24
Revert "kvm: support TSC deadline MSR"
Marcelo Tosatti
1
-1
/
+0
2011-10-03
kvm: support TSC deadline MSR
Liu, Jinsong
1
-0
/
+1
2011-06-26
Remove exec-all.h include directives
Blue Swirl
1
-1
/
+1
2011-06-21
kvm: fix FPU state subsection
Marcelo Tosatti
1
-3
/
+3
2011-06-19
kvm: x86: Save/restore FPU OP, IP and DP
Jan Kiszka
1
-0
/
+23
2011-06-03
target-i386: remove old code handling float64
Aurelien Jarno
1
-101
/
+0
2011-03-22
Revert "x86: Save/restore PAT MSR"
Anthony Liguori
1
-2
/
+0
2011-03-16
x86: Save/restore PAT MSR
Jan Kiszka
1
-0
/
+2
2010-11-16
Add support for async page fault to qemu
Gleb Natapov
1
-0
/
+26
2010-06-28
kvm: Enable XSAVE live migration support
Sheng Yang
1
-0
/
+20
2010-03-04
KVM: Rework VCPU state writeback API
Jan Kiszka
1
-11
/
+0
2009-12-18
Revert "kvm: x86: Save/restore exception_index"
Anthony Liguori
1
-1
/
+0
2009-12-18
kvm: x86: Use separate exception_injected CPUState field
Jan Kiszka
1
-0
/
+1
2009-12-12
v2: properly save kvm system time msr registers
Glauber Costa
1
-0
/
+3
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