riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2004-05-08	cr0.ET fix (Win95 boot fix)	bellard	1	-1/+1
2004-04-25	dump A20 state	bellard	1	-2/+3
2004-03-31	win32 port (initial patch by kazu)	bellard	1	-5/+4
2004-03-04	2.6 kernel compile fix	bellard	1	-0/+5
2004-02-25	CR0.MP/EM/TS support - native fpu support in code copy mode	bellard	1	-0/+73
2004-02-16	experimental code copy support - fixed A20 emulation	bellard	1	-1/+28
2004-02-07	fixed WP semantics	bellard	1	-3/+3
2004-02-03	more precise TLB invalidation - init cleanup	bellard	1	-41/+62
2004-01-24	combine PDE and PTE protections as in intel specs - added cpu_get_phys_page_d...	bellard	1	-18/+62
2004-01-18	fixed dirty bit support for 4M pages (L4 Pistachio fix)	bellard	1	-2/+2
2004-01-13	fixed subtle bug: in some cases PG_DIRTY was not set correctly	bellard	1	-7/+12
2004-01-04	correct value for ADDSEG is real mode (fixes GRUB boot) - update static prote...	bellard	1	-77/+14
2004-01-04	debug fixes - use more generic TLB mappings	bellard	1	-18/+8
2003-12-02	dump irq inhibit flag as it is a part of the cpu state	bellard	1	-2/+3
2003-11-23	a20 fix	bellard	1	-0/+4
2003-11-19	always completely redefine the TLB in case of MMU fault	bellard	1	-0/+3
2003-11-12	dump more registers	bellard	1	-10/+31
2003-11-04	a20 support	bellard	1	-5/+30
2003-10-27	full softmmu support	bellard	1	-33/+43
2003-09-30	new directory structure	bellard	1	-0/+390