Age | Commit message (Expand) | Author | Files | Lines |
2015-12-17 | kvm: x86: add support for KVM_CAP_SPLIT_IRQCHIP | Paolo Bonzini | 1 | -1/+1 |
2015-12-17 | target-i386/kvm: Hyper-V SynIC timers MSR's support | Andrey Smetanin | 1 | -0/+1 |
2015-12-17 | target-i386/kvm: Hyper-V SynIC MSR's support | Andrey Smetanin | 1 | -0/+1 |
2015-11-17 | target-i386: Disable rdtscp on Opteron_G* CPU models | Eduardo Habkost | 1 | -4/+8 |
2015-11-06 | target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURES | Xiao Guangrong | 1 | -1/+3 |
2015-11-05 | target-i386: Enable clflushopt/clwb/pcommit instructions | Xiao Guangrong | 1 | -2/+2 |
2015-11-05 | target-i386: Remove POPCNT from qemu64 and qemu32 CPU models | Eduardo Habkost | 1 | -2/+2 |
2015-11-05 | target-i386: Remove ABM from qemu64 CPU model | Eduardo Habkost | 1 | -2/+1 |
2015-11-05 | target-i386: Remove SSE4a from qemu64 CPU model | Eduardo Habkost | 1 | -1/+1 |
2015-11-04 | osdep: Rename qemu_{get, set}_version() to qemu_{, set_}hw_version() | Eduardo Habkost | 1 | -1/+1 |
2015-10-27 | target-i386: Enable "check" mode by default | Eduardo Habkost | 1 | -1/+1 |
2015-10-23 | target-i386: Use 1UL for bit shift | Eduardo Habkost | 1 | -1/+1 |
2015-10-23 | target-i386: Add DE to TCG_FEATURES | Eduardo Habkost | 1 | -1/+1 |
2015-10-23 | target-i386: Disable cache info passthrough by default | Eduardo Habkost | 1 | -3/+1 |
2015-10-19 | kvm: Allow the Hyper-V vendor ID to be specified | Alex Williamson | 1 | -0/+1 |
2015-10-12 | target-i386/kvm: Hyper-V HV_X64_MSR_VP_RUNTIME support | Andrey Smetanin | 1 | -0/+1 |
2015-10-12 | target-i386/kvm: set Hyper-V features cpuid bit HV_X64_MSR_VP_INDEX_AVAILABLE | Andrey Smetanin | 1 | -0/+1 |
2015-10-12 | target-i386/kvm: Hyper-V HV_X64_MSR_RESET support | Andrey Smetanin | 1 | -0/+1 |
2015-10-09 | qdev: Protect device-list-properties against broken devices | Markus Armbruster | 1 | -0/+8 |
2015-10-02 | cpu/apic: drop icc bus/bridge | Chen Fan | 1 | -8/+1 |
2015-10-02 | apic: move APIC's MMIO region mapping into APIC | Chen Fan | 1 | -0/+15 |
2015-10-02 | target-i386: add ABM to Haswell* and Broadwell* CPU models | Paolo Bonzini | 1 | -4/+4 |
2015-10-02 | target-i386: Convert kvm_default_*features to property/value pairs | Eduardo Habkost | 1 | -37/+50 |
2015-09-25 | i386: partial revert of interrupt poll fix | Pavel Dovgalyuk | 1 | -8/+2 |
2015-09-25 | utils: rename strtosz to use qemu prefix | Marc-André Lureau | 1 | -2/+2 |
2015-09-16 | i386/kvm: Hyper-v crash msrs set/get'ers and migration | Andrey Smetanin | 1 | -0/+1 |
2015-08-13 | target-i386: Remove x86_cpu_compat_set_features() | Eduardo Habkost | 1 | -26/+0 |
2015-07-15 | target-i386: emulate CPUID level of real hardware | Radim Krčmář | 1 | -19/+18 |
2015-07-15 | target-i386: Don't strdup() alias property name | Eduardo Habkost | 1 | -1/+1 |
2015-07-09 | cpu: Change cpu_exec_init() arg to cpu, not env | Peter Crosthwaite | 1 | -1/+1 |
2015-07-09 | cpu: Add Error argument to cpu_exec_init() | Bharata B Rao | 1 | -1/+1 |
2015-07-07 | i386: Introduce ARAT CPU feature | Jan Kiszka | 1 | -1/+32 |
2015-06-22 | qerror: Move #include out of qerror.h | Markus Armbruster | 1 | -0/+1 |
2015-06-22 | qerror: Clean up QERR_ macros to expand into a single string | Markus Armbruster | 1 | -10/+9 |
2015-06-05 | target-i386: use memory API to implement SMRAM | Paolo Bonzini | 1 | -2/+31 |
2015-06-05 | target-i386: create a separate AddressSpace for each CPU | Paolo Bonzini | 1 | -0/+14 |
2015-06-05 | target-i386: wake up processors that receive an SMI | Paolo Bonzini | 1 | -1/+3 |
2015-06-02 | target-i386: Register QOM properties for feature flags | Eduardo Habkost | 1 | -0/+122 |
2015-04-27 | target-i386: Remove AMD feature flag aliases from CPU model table | Eduardo Habkost | 1 | -7/+0 |
2015-04-27 | target-i386: X86CPU::xlevel2 QOM property | Eduardo Habkost | 1 | -1/+2 |
2015-04-27 | target-i386: Make "level" and "xlevel" properties static | Eduardo Habkost | 1 | -38/+2 |
2015-04-02 | target-i386: clear bsp bit when designating bsp | Nadav Amit | 1 | -3/+1 |
2015-03-19 | target-i386: Haswell-noTSX and Broadwell-noTSX | Eduardo Habkost | 1 | -0/+69 |
2015-03-19 | Revert "target-i386: Disable HLE and RTM on Haswell & Broadwell" | Eduardo Habkost | 1 | -4/+5 |
2015-03-17 | target-i386: Remove icc_bridge parameter from cpu_x86_create() | Eduardo Habkost | 1 | -12/+2 |
2015-03-11 | Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into s... | Peter Maydell | 1 | -6/+2 |
2015-03-10 | target-i386: Clean up misuse of qdev_init() in realize method | Markus Armbruster | 1 | -6/+2 |
2015-03-09 | target-i386: Require APIC ID to be explicitly set before CPU realize | Eduardo Habkost | 1 | -0/+10 |
2015-03-09 | target-i386: Move APIC ID compatibility code to pc.c | Eduardo Habkost | 1 | -34/+0 |
2015-03-09 | target-i386: Move CPUX86State::cpuid_apic_id to X86CPU::apic_id | Eduardo Habkost | 1 | -8/+7 |