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path: root/target-cris/translate_v10.c
AgeCommit message (Expand)AuthorFilesLines
2015-12-17cris: avoid "naked" qemu_logPaolo Bonzini1-1/+1
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson1-3/+0
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson1-1/+1
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt1-1/+1
2015-09-08target-cris: Use movcond and setcondRichard Henderson1-10/+2
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-4/+2
2014-06-09target-cris/translate.c: Remove t_gen_mov_TN_reg and t_gen_mov_reg_TNPeter Maydell1-1/+1
2014-03-13target-cris: Replace DisasContext::env field with CRISCPUAndreas Färber1-8/+8
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-6/+6
2013-02-16target-cris: Move TCG initialization to CRISCPU initfnAndreas Färber1-4/+1
2012-09-15target-cris: Switch to AREG0 free modeAurelien Jarno1-46/+49
2012-09-15target-cris: Avoid AREG0 for helpersAurelien Jarno1-2/+2
2012-06-14cris: Add break support for v10.Edgar E. Iglesias1-0/+1
2012-03-14target-cris: Don't overuse CPUStateAndreas Färber1-13/+13
2011-12-12cris: Handle conditional stores on CRISv10Stefan Sandstrom1-6/+66
2011-06-28cris: Handle opcode zeroEdgar E. Iglesias1-3/+0
2011-05-08Fix typo in comment (truely -> truly)Stefan Weil1-1/+1
2011-01-10cris: Allow more TB chaining for crisv10Edgar E. Iglesias1-4/+6
2010-10-13cris: avoid a write only variableBlue Swirl1-3/+2
2010-03-18Replace assert(0) with abort() or cpu_abort()Blue Swirl1-7/+9
2010-03-07Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2010-02-20cris: Mask interrupts on dslots for CRISv10.Edgar E. Iglesias1-0/+4
2010-02-15crisv10: Prettify.Edgar E. Iglesias1-95/+91
2010-02-15cris: Add support for CRISv10 translation.Edgar E. Iglesias1-0/+1243