| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-09-17 | target-cris: update CPU state save/load to use VMStateDescription | Juan Quintela | 1 | -83/+84 |
| 2009-05-21 | Convert machine registration to use module init functions | Anthony Liguori | 1 | -6/+0 |
| 2009-03-03 | CRIS: Avoid endless loops for unstested CRIS cpu-state load/save. | edgar_igl | 1 | -4/+4 |
| 2009-01-07 | ETRAX: Add a model for the axis devboard88 machine. | edgar_igl | 1 | -0/+1 |
| 2008-06-09 | CRIS: Add (untested) cpu-state save/load. | edgar_igl | 1 | -0/+88 |
| 2008-05-04 | remove target ifdefs from vl.c | aurel32 | 1 | -0/+7 |
 |
index : riscv-gnu-toolchain/qemu.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
| aboutsummaryrefslogtreecommitdiff |