Age | Commit message (Expand) | Author | Files | Lines |
2015-01-15 | target-arm: Fix typo in comment (seperately -> separately) | Stefan Weil | 1 | -1/+1 |
2015-01-12 | kvm: extend kvm_irqchip_add_msi_route to work on s390 | Frank Blaschka | 1 | -0/+6 |
2015-01-09 | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging | Peter Maydell | 2 | -6/+6 |
2015-01-03 | gen-icount: check cflags instead of use_icount global | Paolo Bonzini | 2 | -2/+2 |
2015-01-03 | translate: check cflags instead of use_icount global | Paolo Bonzini | 2 | -4/+4 |
2014-12-22 | target-arm: add cpu feature EL3 to CPUs with Security Extensions | Fabian Aggeler | 1 | -0/+4 |
2014-12-22 | target-arm: Add ARMCPU secure property | Greg Bellows | 2 | -0/+25 |
2014-12-22 | target-arm: Add feature unset function | Greg Bellows | 1 | -0/+5 |
2014-12-22 | target-arm: Merge EL3 CP15 register lists | Greg Bellows | 1 | -31/+24 |
2014-12-11 | target-arm: Check error conditions on kvm_arm_reset_vcpu | Christoffer Dall | 1 | -2/+11 |
2014-12-11 | target-arm: Support save/load for 64 bit CPUs | Peter Maydell | 1 | -3/+19 |
2014-12-11 | target-arm/kvm: make reg sync code common between kvm32/64 | Alex Bennée | 4 | -101/+137 |
2014-12-11 | target-arm: make MAIR0/1 banked | Greg Bellows | 2 | -4/+29 |
2014-12-11 | target-arm: make c13 cp regs banked (FCSEIDR, ...) | Fabian Aggeler | 3 | -19/+77 |
2014-12-11 | target-arm: make VBAR banked | Greg Bellows | 2 | -3/+12 |
2014-12-11 | target-arm: make PAR banked | Fabian Aggeler | 2 | -11/+22 |
2014-12-11 | target-arm: make IFAR/DFAR banked | Fabian Aggeler | 3 | -9/+28 |
2014-12-11 | target-arm: make DFSR banked | Fabian Aggeler | 2 | -4/+13 |
2014-12-11 | target-arm: make IFSR banked | Fabian Aggeler | 2 | -5/+18 |
2014-12-11 | target-arm: make DACR banked | Fabian Aggeler | 2 | -12/+29 |
2014-12-11 | target-arm: make TTBCR banked | Fabian Aggeler | 3 | -31/+58 |
2014-12-11 | target-arm: make TTBR0/1 banked | Fabian Aggeler | 2 | -14/+43 |
2014-12-11 | target-arm: make CSSELR banked | Fabian Aggeler | 2 | -4/+20 |
2014-12-11 | target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI | Fabian Aggeler | 1 | -0/+54 |
2014-12-11 | target-arm: add SCTLR_EL3 and make SCTLR banked | Fabian Aggeler | 4 | -34/+58 |
2014-12-11 | target-arm: add MVBAR support | Fabian Aggeler | 2 | -6/+10 |
2014-12-11 | target-arm: add SDER definition | Greg Bellows | 2 | -0/+9 |
2014-12-11 | target-arm: add NSACR register | Fabian Aggeler | 2 | -0/+5 |
2014-12-11 | target-arm: implement IRQ/FIQ routing to Monitor mode | Fabian Aggeler | 1 | -0/+9 |
2014-12-11 | target-arm: move AArch32 SCR into security reglist | Fabian Aggeler | 1 | -6/+13 |
2014-12-11 | target-arm: insert AArch32 cpregs twice into hashtable | Fabian Aggeler | 1 | -17/+81 |
2014-12-11 | target-arm: add secure state bit to CPREG hash | Peter Maydell | 4 | -16/+36 |
2014-12-11 | target-arm: add CPREG secure state support | Fabian Aggeler | 1 | -2/+34 |
2014-12-11 | target-arm: add non-secure Translation Block flag | Sergey Fedorov | 3 | -0/+29 |
2014-12-11 | target-arm: add banked register accessors | Fabian Aggeler | 1 | -0/+27 |
2014-12-11 | target-arm: add async excp target_el function | Greg Bellows | 1 | -19/+97 |
2014-12-11 | target-arm: extend async excp masking | Greg Bellows | 1 | -14/+52 |
2014-12-11 | Pass semihosting exit code back to system. | Liviu Ionescu | 1 | -2/+9 |
2014-11-17 | target-arm: handle address translations that start at level 3 | Peter Maydell | 1 | -9/+11 |
2014-11-04 | target-arm: Correct condition for taking VIRQ and VFIQ | Peter Maydell | 1 | -2/+2 |
2014-11-04 | target-arm: Separate out M profile cpu_exec_interrupt handling | Peter Maydell | 2 | -24/+41 |
2014-11-04 | target-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn() | Peter Maydell | 1 | -6/+5 |
2014-11-04 | target-arm/translate.c: Don't pass CPUARMState around in the decoder | Peter Maydell | 1 | -44/+50 |
2014-11-04 | target-arm/translate.c: Don't use IS_M() | Peter Maydell | 1 | -8/+11 |
2014-11-04 | target-arm/translate.c: Use arm_dc_feature() rather than arm_feature() | Peter Maydell | 1 | -60/+80 |
2014-11-04 | target-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macros | Peter Maydell | 1 | -8/+8 |
2014-11-02 | target-arm: A64: remove redundant store | Alex Bennée | 1 | -1/+0 |
2014-10-24 | target-arm: A32: Emulate the SMC instruction | Fabian Aggeler | 2 | -2/+12 |
2014-10-24 | target-arm: make arm_current_el() return EL3 | Fabian Aggeler | 1 | -9/+20 |
2014-10-24 | target-arm: rename arm_current_pl to arm_current_el | Greg Bellows | 8 | -47/+50 |