Age | Commit message (Expand) | Author | Files | Lines |
2016-01-29 | arm: Clean up includes | Peter Maydell | 1 | -0/+1 |
2016-01-27 | gdb: provide the name of the architecture in the target.xml | David Hildenbrand | 2 | -0/+18 |
2016-01-21 | target-arm: Implement FPEXC32_EL2 system register | Peter Maydell | 1 | -0/+16 |
2016-01-21 | target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode | Peter Maydell | 1 | -1/+5 |
2016-01-21 | target-arm: Implement remaining illegal return event checks | Peter Maydell | 1 | -0/+10 |
2016-01-21 | target-arm: Handle exception return from AArch64 to non-EL0 AArch32 | Peter Maydell | 1 | -21/+59 |
2016-01-21 | target-arm: Fix wrong AArch64 entry offset for EL2/EL3 target | Peter Maydell | 1 | -1/+20 |
2016-01-21 | target-arm: Pull semihosting handling out to arm_cpu_do_interrupt() | Peter Maydell | 1 | -39/+81 |
2016-01-21 | target-arm: Use a single entry point for AArch64 and AArch32 exceptions | Peter Maydell | 3 | -36/+44 |
2016-01-21 | target-arm: Move aarch64_cpu_do_interrupt() to helper.c | Peter Maydell | 3 | -105/+101 |
2016-01-21 | target-arm: Properly support EL2 and EL3 in arm_el_is_aa64() | Peter Maydell | 1 | -9/+24 |
2016-01-21 | target-arm: Support multiple address spaces in page table walks | Peter Maydell | 2 | -2/+15 |
2016-01-21 | target-arm: Implement cpu_get_phys_page_attrs_debug | Peter Maydell | 3 | -6/+8 |
2016-01-21 | target-arm: Implement asidx_from_attrs | Peter Maydell | 2 | -0/+9 |
2016-01-21 | target-arm: Add QOM property for Secure memory region | Peter Maydell | 3 | -0/+41 |
2016-01-18 | target-arm: Clean up includes | Peter Maydell | 19 | -31/+19 |
2016-01-15 | target-arm: dump-guest-memory: add vfp notes for arm | Andrew Jones | 1 | -3/+46 |
2016-01-15 | target-arm: dump-guest-memory: add prfpreg notes for aarch64 | Andrew Jones | 1 | -8/+71 |
2016-01-15 | target-arm: support QMP dump-guest-memory | Andrew Jones | 4 | -2/+238 |
2016-01-15 | target-arm: Use the right MMU index in arm_regime_using_lpae_format | Alvise Rigo | 3 | -7/+12 |
2016-01-13 | error: Strip trailing '\n' from error string arguments (again) | Markus Armbruster | 2 | -3/+3 |
2015-12-17 | kvm: x86: add support for KVM_CAP_SPLIT_IRQCHIP | Paolo Bonzini | 1 | -1/+7 |
2015-12-17 | target-arm: kvm - re-inject guest debug exceptions | Alex Bennée | 2 | -9/+27 |
2015-12-17 | target-arm: kvm - add support for HW assisted debug | Alex Bennée | 4 | -22/+415 |
2015-12-17 | target-arm: kvm - support for single step | Alex Bennée | 1 | -0/+7 |
2015-12-17 | target-arm: kvm - implement software breakpoints | Alex Bennée | 4 | -15/+123 |
2015-12-17 | target-arm: kvm64 - introduce kvm_arm_init_debug() | Alex Bennée | 1 | -0/+18 |
2015-12-17 | target-arm: Fix and improve AA32 singlestep translation completion code | Sergey Fedorov | 1 | -34/+31 |
2015-12-17 | target-arm: raise exception on misaligned LDREX operands | Andrew Baumann | 5 | -5/+62 |
2015-11-24 | target-arm/translate-a64.c: Correct unallocated checks for ldst_excl | Peter Maydell | 1 | -13/+2 |
2015-11-24 | target-arm: Don't mask out bits [47:40] in LPAE descriptors for v8 | Peter Maydell | 1 | -1/+11 |
2015-11-19 | target-arm: Update condexec before arch BP check in AA32 translation | Sergey Fedorov | 1 | -0/+1 |
2015-11-19 | target-arm: Update condexec before CP access check in AA32 translation | Sergey Fedorov | 1 | -0/+1 |
2015-11-12 | target-arm: Update PC before calling gen_helper_check_breakpoints() | Sergey Fedorov | 2 | -0/+2 |
2015-11-10 | target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code | Sergey Fedorov | 1 | -11/+14 |
2015-11-10 | target-arm: Fix gdb singlestep handling in arm_debug_excp_handler() | Sergey Fedorov | 1 | -1/+7 |
2015-11-03 | target-arm: Report S/NS status in the CPU debug logs | Peter Maydell | 2 | -2/+21 |
2015-11-03 | target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32 | Peter Maydell | 1 | -3/+5 |
2015-11-03 | target-arm: Add and use symbolic names for register banks | Soren Brinkmann | 4 | -39/+56 |
2015-10-28 | target-*: Advance pc after recognizing a breakpoint | Richard Henderson | 2 | -4/+10 |
2015-10-27 | target-arm: Add support for S1 + S2 MMU translations | Edgar E. Iglesias | 2 | -7/+32 |
2015-10-27 | target-arm: Route S2 MMU faults to EL2 | Edgar E. Iglesias | 1 | -2/+8 |
2015-10-27 | target-arm: Add S2 translation to 32bit S1 PTWs | Edgar E. Iglesias | 1 | -5/+17 |
2015-10-27 | target-arm: Add S2 translation to 64bit S1 PTWs | Edgar E. Iglesias | 2 | -4/+50 |
2015-10-27 | target-arm: Add ARMMMUFaultInfo | Edgar E. Iglesias | 3 | -14/+36 |
2015-10-27 | target-arm: Avoid inline for get_phys_addr | Edgar E. Iglesias | 1 | -8/+8 |
2015-10-27 | target-arm: Add support for S2 page-table protection bits | Edgar E. Iglesias | 1 | -4/+37 |
2015-10-27 | target-arm: Add computation of starting level for S2 PTW | Edgar E. Iglesias | 2 | -13/+126 |
2015-10-27 | target-arm: lpae: Rename granule_sz to stride | Edgar E. Iglesias | 1 | -15/+15 |
2015-10-27 | target-arm: lpae: Replace tsz with computed inputsize | Edgar E. Iglesias | 1 | -11/+11 |