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target-arm
Age
Commit message (
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Author
Files
Lines
2016-02-26
target-arm: Add Hyp mode checks to bad_mode_switch()
Peter Maydell
1
-0
/
+3
2016-02-26
target-arm: Add comment about not implementing NSACR.RFR
Peter Maydell
1
-0
/
+3
2016-02-26
target-arm: In cpsr_write() ignore mode switches from User mode
Peter Maydell
1
-0
/
+1
2016-02-26
target-arm: Raw CPSR writes should skip checks and bank switching
Peter Maydell
4
-6
/
+7
2016-02-26
target-arm: Add write_type argument to cpsr_write()
Peter Maydell
7
-10
/
+20
2016-02-26
target-arm: Give CPSR setting on 32-bit exception return its own helper
Peter Maydell
3
-3
/
+10
2016-02-23
all: Clean up includes
Peter Maydell
2
-2
/
+0
2016-02-18
target-arm: Add PMUSERENR_EL0 register
Alistair Francis
1
-0
/
+6
2016-02-18
target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers
Alistair Francis
1
-0
/
+12
2016-02-18
target-arm: Add the pmceid0 and pmceid1 registers
Alistair Francis
4
-0
/
+22
2016-02-18
target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case
Peter Maydell
2
-4
/
+13
2016-02-18
target-arm: Combine user-only and softmmu get/set_r13_banked()
Peter Maydell
1
-19
/
+0
2016-02-18
target-arm: Move bank_number() into internals.h
Peter Maydell
2
-26
/
+25
2016-02-18
target-arm: Move get/set_r13_banked() to op_helper.c
Peter Maydell
2
-33
/
+37
2016-02-18
target-arm: Clean up trap/undef handling of SRS
Peter Maydell
1
-5
/
+61
2016-02-18
target-arm: Report correct syndrome for FPEXC32_EL2 traps
Peter Maydell
3
-2
/
+20
2016-02-18
target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA traps
Peter Maydell
1
-9
/
+30
2016-02-18
target-arm: Implement MDCR_EL2.TDRA traps
Peter Maydell
1
-3
/
+24
2016-02-18
target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps
Peter Maydell
2
-1
/
+34
2016-02-18
target-arm: Fix handling of SCR.SMD
Peter Maydell
1
-5
/
+7
2016-02-18
target-arm: correct CNTFRQ access rights
Peter Maydell
2
-3
/
+38
2016-02-11
target-arm: Implement checking of fired watchpoint
Sergey Fedorov
3
-14
/
+25
2016-02-11
target-arm: Fix IL bit reported for Thumb VFP and Neon traps
Peter Maydell
1
-3
/
+3
2016-02-11
target-arm: Fix IL bit reported for Thumb coprocessor traps
Peter Maydell
1
-4
/
+4
2016-02-11
target-arm: Correct misleading 'is_thumb' syn_* parameter names
Peter Maydell
1
-14
/
+14
2016-02-11
target-arm: Enable EL3 for Cortex-A53 and Cortex-A57
Peter Maydell
1
-0
/
+2
2016-02-11
target-arm: Implement NSACR trapping behaviour
Peter Maydell
1
-4
/
+58
2016-02-11
target-arm: Add isread parameter to CPAccessFns
Peter Maydell
6
-37
/
+68
2016-02-11
target-arm: Update arm_generate_debug_exceptions() to handle EL2/EL3
Peter Maydell
1
-5
/
+43
2016-02-11
target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR
Peter Maydell
1
-2
/
+4
2016-02-11
target-arm: Implement MDCR_EL3 and SDCR
Peter Maydell
2
-0
/
+27
2016-02-11
target-arm: Fix typo in comment in arm_is_secure_below_el3()
Peter Maydell
1
-1
/
+1
2016-02-09
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
Richard Henderson
2
-12
/
+12
2016-02-09
tcg: Remove lingering references to gen_opc_buf
Richard Henderson
1
-2
/
+1
2016-02-04
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160203'...
Peter Maydell
2
-43
/
+60
2016-02-03
target-arm: Don't report presence of EL2 if it doesn't exist
Peter Maydell
1
-0
/
+9
2016-02-03
target-arm: Implement the S2 MMU inputsize > pamax check
Edgar E. Iglesias
1
-0
/
+8
2016-02-03
target-arm: Rename check_s2_startlevel to check_s2_mmu_setup
Edgar E. Iglesias
1
-6
/
+6
2016-02-03
target-arm: Apply S2 MMU startlevel table size check to AArch64
Edgar E. Iglesias
1
-8
/
+8
2016-02-03
target-arm: Make various system registers visible to EL3
Peter Maydell
1
-29
/
+29
2016-02-03
log: do not unnecessarily include qom/cpu.h
Paolo Bonzini
2
-0
/
+2
2016-01-29
arm: Clean up includes
Peter Maydell
1
-0
/
+1
2016-01-27
gdb: provide the name of the architecture in the target.xml
David Hildenbrand
2
-0
/
+18
2016-01-21
target-arm: Implement FPEXC32_EL2 system register
Peter Maydell
1
-0
/
+16
2016-01-21
target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode
Peter Maydell
1
-1
/
+5
2016-01-21
target-arm: Implement remaining illegal return event checks
Peter Maydell
1
-0
/
+10
2016-01-21
target-arm: Handle exception return from AArch64 to non-EL0 AArch32
Peter Maydell
1
-21
/
+59
2016-01-21
target-arm: Fix wrong AArch64 entry offset for EL2/EL3 target
Peter Maydell
1
-1
/
+20
2016-01-21
target-arm: Pull semihosting handling out to arm_cpu_do_interrupt()
Peter Maydell
1
-39
/
+81
2016-01-21
target-arm: Use a single entry point for AArch64 and AArch32 exceptions
Peter Maydell
3
-36
/
+44
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