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AgeCommit message (Expand)AuthorFilesLines
2012-04-27target-arm: Make SETEND respect bswap_code (BE8) settingPeter Maydell1-4/+4
2012-04-27target-arm: Move A9 config_base_address reset value to ARMCPUPeter Maydell2-3/+2
2012-04-27target-arm: Change cpu_arm_init() return type to ARMCPUAndreas Färber4-7/+7
2012-04-21target-arm: Move reset handling to arm_cpu_resetPeter Maydell2-99/+92
2012-04-21target-arm: Drop cpu_reset_model_id()Peter Maydell1-58/+1
2012-04-21target-arm: Move cache ID register setup to cpu specific init fnsPeter Maydell3-11/+18
2012-04-21target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_resetPeter Maydell1-2/+1
2012-04-21target-arm: Move feature register setup to per-CPU init fnsPeter Maydell3-59/+122
2012-04-21target-arm: Move iWMMXT wCID reset to cpu_state_resetPeter Maydell1-1/+4
2012-04-21target-arm: Drop JTAG_ID documentationPeter Maydell1-2/+0
2012-04-21target-arm: Move SCTLR reset value setup to per cpu init fnsPeter Maydell3-12/+25
2012-04-21target-arm: Move CTR setup to per cpu init fnsPeter Maydell3-12/+24
2012-04-21target-arm: Move MVFR* setup to per cpu init fnsPeter Maydell3-12/+18
2012-04-21target-arm: Move FPSID config to cpu init fnsPeter Maydell3-8/+12
2012-04-21target-arm: Move feature bit settings to CPU init fnsPeter Maydell4-99/+137
2012-04-21target-arm: Add QOM subclasses for each ARM cpu implementationPeter Maydell3-65/+282
2012-04-21target-arm: remind to keep arm features in sync with linux-user/elfload.cBenoit Canet1-0/+4
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-5/+3
2012-04-06Userspace ARM BE8 supportPaul Brook3-10/+42
2012-03-30ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers.Andrew Towers3-1/+3
2012-03-29target-arm: Minimalistic CPU QOM'ificationAndreas Färber4-1/+139
2012-03-29target-arm: Drop cpu_arm_close()Andreas Färber2-6/+0
2012-03-15target-arm: Decode SETEND correctly in ThumbPeter Maydell1-23/+40
2012-03-15target-arm: Clear IT bits when taking exceptions in v7MPeter Maydell1-1/+2
2012-03-15target-arm: Fix typo in ARM946 cp15 c5 handlingPeter Maydell1-1/+1
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-arm: Don't overuse CPUStateAndreas Färber6-195/+195
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
2012-02-28target-arm: Clean includesStefan Weil1-5/+0
2012-02-17target-arm/helper.c: tb_flush() on CPU resetPeter Maydell1-0/+5
2012-02-17target-arm/helper.c: Correct FPSID value for Cortex-A9Peter Maydell1-1/+1
2012-01-25Add Cortex-A15 CPU definitionPeter Maydell2-5/+52
2012-01-25Add dummy implementation of generic timer cp15 registersPeter Maydell2-2/+11
2012-01-25arm: store the config_base_register during cpu_resetMark Langsdorf1-0/+3
2012-01-25target-arm/helper.c: Don't assume softfloat int32 is 32 bits onlyPeter Maydell1-1/+1
2012-01-25target-arm: Fix implementation of TLB invalidate operationsPeter Maydell1-7/+6
2012-01-13arm: Add dummy support for co-processor 15's secure config registerRob Herring3-1/+13
2012-01-13target-arm: Fix errors in decode of M profile CPSPeter Maydell1-4/+4
2012-01-05arm: add dummy A9-specific cp15 registersMark Langsdorf3-1/+59
2012-01-05target-arm: Ignore attempts to set invalid modes in CPSRPeter Maydell1-1/+29
2012-01-05target-arm: Don't use cpu_single_env in bank_number()Peter Maydell1-6/+6
2011-12-13target-arm: Infer VFPv3 feature from VFPv4Andreas Färber1-1/+3
2011-12-13target-arm: Infer VFP feature from VFPv3Andreas Färber1-3/+3
2011-12-13target-arm: Infer Thumb division feature from M profileAndreas Färber1-1/+3
2011-12-13target-arm: Infer Thumb2 feature from ARMv7Andreas Färber1-4/+1
2011-12-13target-arm: Infer AUXCR feature from ARMv6Andreas Färber1-5/+3
2011-12-13target-arm: Infer ARMv6(K) feature from ARMv7Andreas Färber1-4/+5
2011-12-13target-arm: Infer ARMv6 feature from v6KAndreas Färber1-5/+3
2011-12-13target-arm: Infer ARMv5 feature from ARMv6Andreas Färber1-7/+3
2011-12-13target-arm: Infer ARMv4T feature from ARMv5Andreas Färber1-12/+3
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