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AgeCommit message (Expand)AuthorFilesLines
2015-02-05target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell5-29/+102
2015-02-05target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STTPeter Maydell1-1/+1
2015-02-05target-arm: Make arm_current_el() return sensible values for M profilePeter Maydell1-0/+4
2015-02-05target-arm: check that LSB <= MSB in BFI instructionKirill Batuzov1-0/+4
2015-02-05target-arm: Squash input denormals in FRECPS and FRSQRTSPeter Maydell1-0/+12
2015-02-05Fix FMULX not squashing denormalized inputs when FZ is set.Xiangyu Hu1-0/+6
2015-02-05target-arm: Add checks that cpreg raw accesses are handledPeter Maydell1-0/+31
2015-02-05target-arm: Split NO_MIGRATE into ALIAS and NO_RAWPeter Maydell2-108/+117
2015-02-05target-arm: Add missing SP_ELx register definitionGreg Bellows1-0/+8
2015-02-05target-arm: Change reset to highest available ELGreg Bellows1-1/+8
2015-02-05target-arm: Add extended RVBAR supportGreg Bellows1-6/+25
2015-02-05target-arm: Fix RVBAR_EL1 register encodingGreg Bellows1-1/+1
2015-01-26vmstate: accept QEMUTimer in VMSTATE_TIMER*, add VMSTATE_TIMER_PTR*Paolo Bonzini1-2/+2
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell1-2/+0
2015-01-16target-arm: crypto: fix BE host supportArd Biesheuvel1-51/+63
2015-01-15target-arm: Fix typo in comment (seperately -> separately)Stefan Weil1-1/+1
2015-01-12kvm: extend kvm_irqchip_add_msi_route to work on s390Frank Blaschka1-0/+6
2015-01-09Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2-6/+6
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini2-2/+2
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini2-4/+4
2014-12-22target-arm: add cpu feature EL3 to CPUs with Security ExtensionsFabian Aggeler1-0/+4
2014-12-22target-arm: Add ARMCPU secure propertyGreg Bellows2-0/+25
2014-12-22target-arm: Add feature unset functionGreg Bellows1-0/+5
2014-12-22target-arm: Merge EL3 CP15 register listsGreg Bellows1-31/+24
2014-12-11target-arm: Check error conditions on kvm_arm_reset_vcpuChristoffer Dall1-2/+11
2014-12-11target-arm: Support save/load for 64 bit CPUsPeter Maydell1-3/+19
2014-12-11target-arm/kvm: make reg sync code common between kvm32/64Alex Bennée4-101/+137
2014-12-11target-arm: make MAIR0/1 bankedGreg Bellows2-4/+29
2014-12-11target-arm: make c13 cp regs banked (FCSEIDR, ...)Fabian Aggeler3-19/+77
2014-12-11target-arm: make VBAR bankedGreg Bellows2-3/+12
2014-12-11target-arm: make PAR bankedFabian Aggeler2-11/+22
2014-12-11target-arm: make IFAR/DFAR bankedFabian Aggeler3-9/+28
2014-12-11target-arm: make DFSR bankedFabian Aggeler2-4/+13
2014-12-11target-arm: make IFSR bankedFabian Aggeler2-5/+18
2014-12-11target-arm: make DACR bankedFabian Aggeler2-12/+29
2014-12-11target-arm: make TTBCR bankedFabian Aggeler3-31/+58
2014-12-11target-arm: make TTBR0/1 bankedFabian Aggeler2-14/+43
2014-12-11target-arm: make CSSELR bankedFabian Aggeler2-4/+20
2014-12-11target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFIFabian Aggeler1-0/+54
2014-12-11target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler4-34/+58
2014-12-11target-arm: add MVBAR supportFabian Aggeler2-6/+10
2014-12-11target-arm: add SDER definitionGreg Bellows2-0/+9
2014-12-11target-arm: add NSACR registerFabian Aggeler2-0/+5
2014-12-11target-arm: implement IRQ/FIQ routing to Monitor modeFabian Aggeler1-0/+9
2014-12-11target-arm: move AArch32 SCR into security reglistFabian Aggeler1-6/+13
2014-12-11target-arm: insert AArch32 cpregs twice into hashtableFabian Aggeler1-17/+81
2014-12-11target-arm: add secure state bit to CPREG hashPeter Maydell4-16/+36
2014-12-11target-arm: add CPREG secure state supportFabian Aggeler1-2/+34
2014-12-11target-arm: add non-secure Translation Block flagSergey Fedorov3-0/+29
2014-12-11target-arm: add banked register accessorsFabian Aggeler1-0/+27
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