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target-arm
Age
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Author
Files
Lines
2015-06-15
target-arm: Correct "preferred return address" for cpreg access exceptions
Peter Maydell
1
-1
/
+1
2015-06-15
arm: helper: rename get_phys_addr_mpu
Peter Crosthwaite
1
-5
/
+5
2015-06-15
arm: Add has-mpu property
Peter Crosthwaite
2
-0
/
+16
2015-06-15
arm: Implement uniprocessor with MP config
Peter Crosthwaite
2
-2
/
+7
2015-06-15
arm: Refactor get_phys_addr FSR return mechanism
Peter Crosthwaite
3
-64
/
+78
2015-06-15
arm: helper: Factor out CP regs common to [pv]msa
Peter Crosthwaite
1
-9
/
+14
2015-06-15
arm: Don't add v7mp registers in MPU systems
Peter Crosthwaite
1
-1
/
+2
2015-06-15
arm: Do not define TLBTR in PMSA systems
Peter Crosthwaite
1
-3
/
+10
2015-06-15
target-arm: Add the THUMB_DSP feature
Aurelio C. Remonda
3
-10
/
+107
2015-06-15
target-arm: Use the kernel's idea of MPIDR if we're using KVM
Pavel Fedin
6
-8
/
+63
2015-06-15
target-arm: add AArch32 MIDR aliases in ARMv8
Sergey Fedorov
1
-3
/
+7
2015-06-15
target-arm: Fix REVIDR reset value
Sergey Fedorov
3
-3
/
+5
2015-06-15
target-arm/kvm64: Add cortex-a53 cpu support
Shannon Zhao
2
-0
/
+5
2015-06-15
target-arm/cpu.h: remove pending_exception
Alex Bennée
1
-1
/
+0
2015-06-15
target-arm: use extended address bits from supersection short descriptor
Sergey Fedorov
1
-0
/
+2
2015-06-15
target-arm: Handle "extended small page" descriptors correctly
Peter Maydell
1
-4
/
+9
2015-06-12
migration: Use normal VMStateDescriptions for Subsections
Juan Quintela
1
-16
/
+10
2015-06-02
target-arm: Remove v8_ prefix from names of non-v8-specific cpreg arrays
Peter Maydell
1
-4
/
+4
2015-06-02
kvm: introduce kvm_arch_msi_data_to_gsi
Eric Auger
1
-0
/
+5
2015-06-02
Revert "target-arm: Avoid g_hash_table_get_keys()"
Markus Armbruster
1
-10
/
+2
2015-06-02
target-arm: Add TLBI_VAE2{IS}
Edgar E. Iglesias
1
-0
/
+8
2015-06-02
target-arm: Add TLBI_ALLE2
Edgar E. Iglesias
1
-0
/
+4
2015-06-02
target-arm: Add TLBI_ALLE1{IS}
Edgar E. Iglesias
1
-0
/
+8
2015-06-02
target-arm: Add TTBR0_EL2
Edgar E. Iglesias
1
-0
/
+14
2015-06-02
target-arm: Add TPIDR_EL2
Edgar E. Iglesias
1
-0
/
+7
2015-06-02
target-arm: Add SCTLR_EL2
Edgar E. Iglesias
1
-0
/
+7
2015-06-02
target-arm: Add TCR_EL2
Edgar E. Iglesias
1
-0
/
+8
2015-06-02
target-arm: Add MAIR_EL2
Edgar E. Iglesias
1
-0
/
+15
2015-06-02
target-arm: Break down TLB_LOCKDOWN
Edgar E. Iglesias
1
-12
/
+18
2015-06-02
target-arm: Correct check for non-EL3
Edgar E. Iglesias
1
-1
/
+1
2015-05-29
target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strd
Peter Maydell
1
-24
/
+32
2015-05-29
target-arm: Add WFx instruction trap support
Greg Bellows
1
-1
/
+59
2015-05-29
target-arm: Don't halt on WFI unless we don't have any work
Peter Maydell
3
-0
/
+15
2015-05-29
target-arm: Move TB flags down to fill gap
Peter Maydell
1
-2
/
+2
2015-05-29
target-arm: Extend FP checks to use an EL
Greg Bellows
4
-37
/
+82
2015-05-29
target-arm: Make singlestate TB flags common between AArch32/64
Peter Maydell
2
-44
/
+29
2015-05-29
target-arm: Add AArch64 CPTR registers
Greg Bellows
2
-1
/
+44
2015-05-29
target-arm: Allow cp access functions to indicate traps to EL2 or EL3
Peter Maydell
2
-2
/
+19
2015-05-29
target-arm: Update interrupt handling to use target EL
Greg Bellows
4
-61
/
+50
2015-05-29
target-arm: Make raise_exception() take syndrome and target EL
Peter Maydell
1
-40
/
+28
2015-05-29
target-arm: Set exception target EL in tlb_fill
Peter Maydell
1
-0
/
+1
2015-05-29
target-arm: Move setting of exception info into tlb_fill
Peter Maydell
5
-44
/
+52
2015-05-29
target-arm: Set correct syndrome for faults on MSR DAIF*, imm
Peter Maydell
1
-0
/
+3
2015-05-29
target-arm: Extend helpers to route exceptions
Greg Bellows
1
-0
/
+21
2015-05-29
target-arm: Add exception target el infrastructure
Greg Bellows
6
-37
/
+83
2015-05-18
target-arm: Remove unneeded '+'
Edgar E. Iglesias
1
-1
/
+1
2015-05-18
target-arm: Correct accessfn for CNTV_TVAL_EL0
Edgar E. Iglesias
1
-0
/
+1
2015-05-18
target-arm: Correct accessfn for CNTP_{CT}VAL_EL0
Edgar E. Iglesias
1
-1
/
+2
2015-05-18
target-arm: Add WFx syndrome function
Greg Bellows
1
-0
/
+6
2015-05-18
target-arm: Add EL3 and EL2 TCR checking
Greg Bellows
1
-13
/
+32
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