Age | Commit message (Expand) | Author | Files | Lines |
2014-03-27 | target-arm: Add missing 'static' attribute | Stefan Weil | 1 | -1/+1 |
2014-03-24 | target-arm: Fix A64 Neon MLS | Peter Maydell | 1 | -1/+1 |
2014-03-18 | target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD) | Alex Bennée | 3 | -10/+284 |
2014-03-18 | target-arm: A64: Add saturating int ops (SQNEG/SQABS) | Alex Bennée | 3 | -12/+75 |
2014-03-17 | target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate) | Alex Bennée | 4 | -37/+140 |
2014-03-17 | target-arm: A64: Implement FCVTXN | Peter Maydell | 3 | -1/+43 |
2014-03-17 | target-arm: A64: Implement scalar saturating narrow ops | Alex Bennée | 1 | -7/+28 |
2014-03-17 | target-arm: A64: Move handle_2misc_narrow function | Alex Bennée | 1 | -90/+90 |
2014-03-17 | target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE | Alex Bennée | 4 | -42/+195 |
2014-03-17 | target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories | Peter Maydell | 1 | -2/+78 |
2014-03-17 | target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL | Peter Maydell | 1 | -0/+132 |
2014-03-17 | target-arm: A64: Implement FRINT* | Peter Maydell | 1 | -3/+42 |
2014-03-17 | target-arm: A64: Implement SRI | Peter Maydell | 1 | -8/+49 |
2014-03-17 | target-arm: A64: Add FRECPX (reciprocal exponent) | Alex Bennée | 3 | -1/+130 |
2014-03-17 | target-arm: A64: List unsupported shift-imm opcodes | Peter Maydell | 1 | -2/+11 |
2014-03-17 | target-arm: A64: Implement FCVTL | Peter Maydell | 1 | -0/+47 |
2014-03-17 | target-arm: A64: Implement FCVTN | Peter Maydell | 1 | -1/+23 |
2014-03-17 | target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions | Peter Maydell | 1 | -19/+169 |
2014-03-17 | target-arm: A64: Implement SHLL, SHLL2 | Peter Maydell | 1 | -1/+31 |
2014-03-17 | target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP | Peter Maydell | 3 | -1/+139 |
2014-03-17 | target-arm: A64: Saturating and narrowing shift ops | Alex Bennée | 1 | -3/+178 |
2014-03-17 | target-arm: A64: Add remaining CLS/Z vector ops | Alex Bennée | 3 | -1/+41 |
2014-03-17 | target-arm: A64: Add FSQRT to C3.6.17 (two misc) | Alex Bennée | 1 | -1/+12 |
2014-03-17 | target-arm: A64: Add last AdvSIMD Integer to FP ops | Alex Bennée | 1 | -9/+123 |
2014-03-17 | target-arm: A64: Fix bug in add_sub_ext handling of rn | Alex Bennée | 1 | -2/+1 |
2014-03-17 | target-arm: A64: Implement PMULL instruction | Peter Maydell | 5 | -2/+78 |
2014-03-17 | target-arm: Add ARM_CP_IO notation to PMCR reginfo | Peter Maydell | 1 | -0/+1 |
2014-03-15 | misc: Fix typos in comments | Stefan Weil | 1 | -1/+1 |
2014-03-13 | cputlb: Change tlb_set_page() argument to CPUState | Andreas Färber | 1 | -1/+1 |
2014-03-13 | cputlb: Change tlb_flush() argument to CPUState | Andreas Färber | 2 | -11/+30 |
2014-03-13 | cputlb: Change tlb_flush_page() argument to CPUState | Andreas Färber | 1 | -4/+10 |
2014-03-13 | exec: Change cpu_abort() argument to CPUState | Andreas Färber | 2 | -11/+26 |
2014-03-13 | translate-all: Change cpu_restore_state() argument to CPUState | Andreas Färber | 1 | -1/+1 |
2014-03-13 | cpu-exec: Change cpu_loop_exit() argument to CPUState | Andreas Färber | 1 | -4/+4 |
2014-03-13 | exec: Change tlb_fill() argument to CPUState | Andreas Färber | 1 | -5/+7 |
2014-03-13 | cpu: Move breakpoints field from CPU_COMMON to CPUState | Andreas Färber | 3 | -5/+5 |
2014-03-13 | cpu: Move opaque field from CPU_COMMON to CPUState | Andreas Färber | 1 | -4/+5 |
2014-03-13 | cpu: Move exception_index field from CPU_COMMON to CPUState | Andreas Färber | 2 | -20/+25 |
2014-03-13 | cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook | Andreas Färber | 4 | -9/+16 |
2014-03-13 | cpu: Factor out cpu_generic_init() | Andreas Färber | 1 | -13/+1 |
2014-03-13 | cpu: Turn cpu_has_work() into a CPUClass hook | Andreas Färber | 2 | -6/+7 |
2014-03-13 | target-arm: Clean up ENV_GET_CPU() usage | Andreas Färber | 1 | -5/+7 |
2014-03-10 | target-arm: Implement WFE as a yield operation | Peter Maydell | 4 | -0/+18 |
2014-03-10 | target-arm: Fix intptr_t vs tcg_target_long | Richard Henderson | 1 | -1/+1 |
2014-03-10 | target-arm: Implements the ARM PMCCNTR register | Alistair Francis | 2 | -4/+89 |
2014-03-10 | target-arm: Fix incorrect setting of E bit in CPSR | Peter Maydell | 1 | -1/+1 |
2014-02-26 | target-arm: Add support for AArch32 ARMv8 CRC32 instructions | Will Newton | 5 | -0/+100 |
2014-02-26 | target-arm: Add utility function for checking AA32/64 state of an EL | Peter Maydell | 1 | -0/+16 |
2014-02-26 | target-arm: Implement AArch64 view of CPACR | Peter Maydell | 2 | -2/+3 |
2014-02-26 | target-arm: A64: Implement MSR (immediate) instructions | Peter Maydell | 3 | -1/+51 |