Age | Commit message (Expand) | Author | Files | Lines |
2011-02-04 | target-arm: Fix decoding of Thumb preload and hint space | Peter Maydell | 1 | -22/+48 |
2011-02-04 | target-arm: Fix decoding of preload and memory hint space | Peter Maydell | 1 | -3/+25 |
2011-02-04 | target-arm: Clean up handling of MPIDR | Peter Maydell | 1 | -5/+21 |
2011-02-04 | target-arm: Add CPU feature flag for v7MP | Peter Maydell | 2 | -1/+8 |
2011-02-04 | Set the right overflow bit for neon 32 and 64 bit saturating add/sub. | Christophe Lyon | 4 | -63/+105 |
2011-02-04 | target-arm: Fix Neon vsra instructions. | Christophe Lyon | 1 | -2/+2 |
2011-01-29 | target-arm: Fix Neon VQ(R)DMULH.S16 instructions | Juha Riihimäki | 1 | -1/+2 |
2011-01-26 | target-arm: Fix loading of scalar value for Neon multiply-by-scalar | Peter Maydell | 1 | -6/+6 |
2011-01-26 | target-arm: Fix garbage collection of temporaries in Neon emulation. | Christophe Lyon | 1 | -5/+13 |
2011-01-26 | Support saturation with shift=0. | Christophe Lyon | 1 | -16/+12 |
2011-01-18 | target-arm: Log instruction start in TCG code | Peter Maydell | 1 | -0/+4 |
2011-01-14 | target-arm: Restore IT bits when resuming after an exception | Peter Maydell | 1 | -0/+36 |
2011-01-14 | target-arm: Refactor translation of exception generating instructions | Peter Maydell | 1 | -28/+15 |
2011-01-14 | target-arm: Remove redundant setting of IT bits before Thumb SWI | Peter Maydell | 1 | -1/+0 |
2011-01-14 | target-arm: Translate with user-state from TB flags, not CPUState | Peter Maydell | 1 | -5/+1 |
2011-01-14 | target-arm: Set privileged bit in TB flags correctly for M profile | Peter Maydell | 1 | -1/+7 |
2011-01-14 | target-arm: Translate with condexec bits from TB flags, not CPUState | Peter Maydell | 1 | -3/+3 |
2011-01-14 | target-arm: Translate with Thumb state from TB flags, not CPUState | Peter Maydell | 1 | -3/+3 |
2011-01-14 | target-arm: Translate with VFP len/stride from TB flags, not CPUState | Peter Maydell | 1 | -3/+7 |
2011-01-14 | target-arm: Translate with VFP-enabled from TB flags, not CPUState | Peter Maydell | 1 | -9/+5 |
2011-01-14 | target-arm: Add symbolic constants for bitfields in TB flags | Peter Maydell | 1 | -6/+39 |
2011-01-14 | target-arm: Don't generate code specific to current CPU mode for SRS | Peter Maydell | 2 | -33/+25 |
2011-01-14 | target-arm: Use the standard FPSCR value for VRSQRTS | Peter Maydell | 1 | -1/+1 |
2011-01-14 | target-arm: Add support for 'Standard FPSCR Value' as used by Neon | Peter Maydell | 2 | -0/+18 |
2011-01-14 | target-arm: Fix implementation of VRSQRTS | Peter Maydell | 1 | -1/+9 |
2011-01-12 | ARM: Fix decoding of VQSHL/VQSHLU immediate forms | Peter Maydell | 1 | -15/+36 |
2011-01-12 | ARM: add neon helpers for VQSHLU | Juha Riihimäki | 2 | -0/+51 |
2011-01-06 | target-arm: wire up the softfloat flush_input_to_zero flag | Peter Maydell | 1 | -1/+7 |
2011-01-06 | target-arm: Set softfloat cumulative exc flags from correct FPSCR bits | Peter Maydell | 1 | -1/+1 |
2011-01-06 | target-arm: fix SMMLA/SMMLS instructions | Aurelien Jarno | 1 | -45/+51 |
2010-12-31 | target-arm: fix UMAAL instruction | Aurelien Jarno | 1 | -10/+22 |
2010-12-27 | target-arm: correct cp15 c1_sys reset value for arm1136 and cortex-a9 | Juha Riihimäki | 1 | -0/+2 |
2010-12-27 | target-arm: correct cp15 c1_sys reset value for cortex-a8 | Mattias Holm | 1 | -0/+1 |
2010-12-27 | target-arm: fix vmsav6 access control | Juha Riihimäki | 1 | -15/+19 |
2010-12-27 | target-arm: Correct result in saturating cases for VQSHL of s8/16/32 | Peter Maydell | 1 | -3/+12 |
2010-12-27 | target-arm: remove pointless else clause in VQSHL of u64 | Juha Riihimäki | 1 | -2/+0 |
2010-12-27 | target-arm: Fix VQSHL of signed 64 bit values by shift counts >= 64 | Peter Maydell | 1 | -1/+1 |
2010-12-27 | target-arm: Fix VQSHL of signed 64 bit values | Juha Riihimäki | 1 | -1/+1 |
2010-12-27 | target-arm: Fix arguments passed to VQSHL helpers | Juha Riihimäki | 1 | -2/+2 |
2010-12-27 | target-arm: fix bug in translation of REVSH | Aurelien Jarno | 1 | -7/+3 |
2010-12-07 | ARM: Implement VCVT to 16 bit integer using new softfloat routines | Peter Maydell | 1 | -1/+1 |
2010-12-07 | ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point | Peter Maydell | 1 | -1/+1 |
2010-12-07 | ARM: Return correct result for single<->double conversion of NaN | Peter Maydell | 1 | -2/+10 |
2010-12-07 | ARM: Return correct result for float-to-integer conversion of NaN | Peter Maydell | 1 | -0/+27 |
2010-12-07 | ARM: Fix sense of to_integer bit in Neon VCVT float/int conversion | Peter Maydell | 1 | -4/+4 |
2010-12-07 | ARM: Fix decoding of Neon forms of VCVT between float and fixed point | Peter Maydell | 1 | -2/+6 |
2010-12-07 | ARM: Fix decoding of VFP forms of VCVT between float and int/fixed | Peter Maydell | 1 | -7/+12 |
2010-12-07 | ARM: fix ldrexd/strexd | Peter Maydell | 1 | -3/+5 |
2010-12-07 | target-arm: Handle 'smc' as an undefined instruction | Adam Lackorzynski | 1 | -1/+8 |
2010-12-07 | target-arm: Fix mixup in decoding of saturating add and sub | Johan Bengtsson | 1 | -2/+2 |