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path: root/target-arm/translate.c
AgeCommit message (Expand)AuthorFilesLines
2015-05-29target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strdPeter Maydell1-24/+32
2015-05-29target-arm: Don't halt on WFI unless we don't have any workPeter Maydell1-0/+4
2015-05-29target-arm: Extend FP checks to use an ELGreg Bellows1-10/+7
2015-05-29target-arm: Add exception target el infrastructureGreg Bellows1-23/+42
2015-03-16target-arm: Fix handling of STM (user) with r15 in register listPeter Maydell1-6/+12
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-4/+4
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-6/+3
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson1-1/+0
2015-02-05target-arm: Use correct mmu_idx for unprivileged loads and storesPeter Maydell1-2/+24
2015-02-05target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell1-2/+3
2015-02-05target-arm: check that LSB <= MSB in BFI instructionKirill Batuzov1-0/+4
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini1-1/+1
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini1-2/+2
2014-12-11target-arm: add secure state bit to CPREG hashPeter Maydell1-5/+9
2014-12-11target-arm: add non-secure Translation Block flagSergey Fedorov1-0/+1
2014-11-04target-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn()Peter Maydell1-6/+5
2014-11-04target-arm/translate.c: Don't pass CPUARMState around in the decoderPeter Maydell1-44/+50
2014-11-04target-arm/translate.c: Don't use IS_M()Peter Maydell1-8/+11
2014-11-04target-arm/translate.c: Use arm_dc_feature() rather than arm_feature()Peter Maydell1-60/+80
2014-11-04target-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macrosPeter Maydell1-8/+8
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows1-2/+2
2014-10-24target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0Peter Maydell1-0/+3
2014-10-24target-arm: Add support for A32 and T32 HVC and SMC insnsPeter Maydell1-11/+92
2014-09-29target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell1-19/+21
2014-08-19target-arm: Implement ARMv8 single-stepping for AArch32 codePeter Maydell1-2/+74
2014-08-19target-arm: Don't allow AArch32 to access RES0 CPSR bitsPeter Maydell1-6/+7
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova1-0/+3
2014-06-09target-arm: Delete unused iwmmxt_msadb helperPeter Maydell1-2/+0
2014-06-09target-arm: A32/T32: Mask CRC value in calling code, not helperPeter Maydell1-0/+10
2014-06-09target-arm: add support for v8 VMULL.P64 instructionPeter Maydell1-1/+25
2014-06-09target-arm: Allow 3reg_wide undefreq to encode more bad size optionsPeter Maydell1-12/+12
2014-06-09target-arm: add support for v8 SHA1 and SHA256 instructionsArd Biesheuvel1-0/+84
2014-06-05target-arm: move arm_*_code to a separate filePaolo Bonzini1-0/+1
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-3/+2
2014-05-27target-arm: Add SPSR entries for EL2/HYP and EL3/MONEdgar E. Iglesias1-2/+2
2014-05-27target-arm: A32: Use get_mem_index for load/storesEdgar E. Iglesias1-106/+106
2014-05-27target-arm/translate.c: Use get_mem_index() for SRS memory accessesPeter Maydell1-2/+2
2014-05-27target-arm/translate.c: Clean up mmu index handling for ldrt/strtPeter Maydell1-12/+17
2014-04-17arm: translate.c: Fix smlald InstructionPeter Crosthwaite1-11/+23
2014-04-17target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell1-0/+5
2014-04-17target-arm: Implement ARMv8 MVFR registersPeter Maydell1-2/+8
2014-04-17target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1Peter Maydell1-0/+31
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell1-38/+65
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell1-1/+44
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell1-0/+1
2014-03-17target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée1-2/+10
2014-03-17target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPEAlex Bennée1-2/+10
2014-03-17target-arm: A64: Implement PMULL instructionPeter Maydell1-0/+1
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber1-2/+2
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