| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2013-03-05 | target-arm: Don't decode RFE or SRS on M profile cores | Peter Maydell | 1 | -2/+3 |
| 2013-03-05 | target-arm: Factor out handling of SRS instruction | Peter Maydell | 1 | -67/+69 |
| 2013-03-03 | gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end | Peter Maydell | 1 | -2/+2 |
| 2013-02-25 | target-arm: Fix sbc_CC carry | Richard Henderson | 1 | -24/+4 |
| 2013-02-25 | arm/translate.c: Fix adc_CC/sbc_CC implementation | Peter Crosthwaite | 1 | -2/+2 |
| 2013-02-23 | target-arm: Implement sbc_cc inline | Richard Henderson | 1 | -8/+39 |
| 2013-02-23 | target-arm: Implement adc_cc inline | Richard Henderson | 1 | -5/+34 |
| 2013-02-23 | target-arm: Use add2 in gen_add_CC | Richard Henderson | 1 | -4/+3 |
| 2013-02-23 | target-arm: Use mul[us]2 and add2 in umlal et al | Richard Henderson | 1 | -12/+14 |
| 2013-02-23 | target-arm: Use mul[us]2 in gen_mul[us]_i64_i32 | Richard Henderson | 1 | -16/+22 |
| 2013-01-30 | target-arm: Fix TCG temp leaks for WI and UNDEF VFP sysreg writes | Peter Maydell | 1 | -1/+4 |
| 2012-12-19 | misc: move include files to include/qemu/ | Paolo Bonzini | 1 | -1/+1 |
| 2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini | 1 | -1/+1 |
| 2012-12-19 | build: kill libdis, move disassemblers to disas/ | Paolo Bonzini | 1 | -1/+1 |
| 2012-12-08 | TCG: Use gen_opc_instr_start from context instead of global variable. | Evgeny Voevodin | 1 | -3/+3 |
| 2012-12-08 | TCG: Use gen_opc_icount from context instead of global variable. | Evgeny Voevodin | 1 | -1/+1 |
| 2012-12-08 | TCG: Use gen_opc_pc from context instead of global variable. | Evgeny Voevodin | 1 | -2/+2 |
| 2012-11-17 | TCG: Use gen_opc_buf from context instead of global variable. | Evgeny Voevodin | 1 | -3/+3 |
| 2012-11-17 | TCG: Use gen_opc_ptr from context instead of global variable. | Evgeny Voevodin | 1 | -4/+4 |
| 2012-11-10 | disas: avoid using cpu_single_env | Blue Swirl | 1 | -1/+1 |
| 2012-10-24 | target-arm: Implement abs_i32 inline rather than as a helper | Peter Maydell | 1 | -2/+9 |
| 2012-10-24 | target-arm: Use TCG operation for Neon 64 bit negation | Peter Maydell | 1 | -1/+3 |
| 2012-10-17 | target-arm/translate: Fix RRX operands | Peter Crosthwaite | 1 | -1/+1 |
| 2012-10-05 | target-arm: use deposit instead of hardcoded version | Aurelien Jarno | 1 | -14/+6 |
| 2012-10-05 | target-arm: convert sar, shl and shr helpers to TCG | Aurelien Jarno | 1 | -6/+43 |
| 2012-10-05 | target-arm: convert add_cc and sub_cc helpers to TCG | Aurelien Jarno | 1 | -18/+48 |
| 2012-10-05 | target-arm: use globals for CC flags | Aurelien Jarno | 1 | -81/+46 |
| 2012-10-05 | target-arm: Reinstate display of VFP registers in cpu_dump_state | Peter Maydell | 1 | -26/+16 |
| 2012-09-27 | Emit debug_insn for CPU_LOG_TB_OP_OPT as well. | Richard Henderson | 1 | -1/+1 |
| 2012-09-15 | target-arm: final conversion to AREG0 free mode | Blue Swirl | 1 | -3/+3 |
| 2012-09-15 | target-arm: convert remaining helpers | Blue Swirl | 1 | -67/+67 |
| 2012-09-15 | target-arm: convert void helpers | Blue Swirl | 1 | -4/+4 |
| 2012-08-10 | target-arm: Fix typos in comments | Peter Maydell | 1 | -5/+5 |
| 2012-08-10 | arm: translate: comment typo - s/middel/middle/ | Peter A. G. Crosthwaite | 1 | -1/+1 |
| 2012-07-12 | target-arm: Fix TCG temp handling in 64 bit cp writes | Peter Maydell | 1 | -0/+2 |
| 2012-07-12 | target-arm: Fix CP15 based WFI | Paul Brook | 1 | -1/+1 |
| 2012-06-20 | target-arm: Remove remaining old cp15 infrastructure | Peter Maydell | 1 | -58/+1 |
| 2012-06-20 | target-arm: Move block cache ops to new cp15 framework | Peter Maydell | 1 | -6/+1 |
| 2012-06-20 | target-arm: Convert performance monitor registers | Peter Maydell | 1 | -25/+1 |
| 2012-06-20 | target-arm: Convert TLS registers | Peter Maydell | 1 | -58/+0 |
| 2012-06-20 | target-arm: Convert WFI/barriers special cases to cp_reginfo | Peter Maydell | 1 | -51/+0 |
| 2012-06-20 | target-arm: Convert TEECR, TEEHBR to new scheme | Peter Maydell | 1 | -66/+0 |
| 2012-06-20 | target-arm: Convert debug registers to cp_reginfo | Peter Maydell | 1 | -28/+0 |
| 2012-06-20 | target-arm: Remove old cpu_arm_set_cp_io infrastructure | Peter Maydell | 1 | -40/+1 |
| 2012-06-20 | target-arm: initial coprocessor register framework | Peter Maydell | 1 | -1/+155 |
| 2012-04-27 | target-arm: Make SETEND respect bswap_code (BE8) setting | Peter Maydell | 1 | -4/+4 |
| 2012-04-06 | Userspace ARM BE8 support | Paul Brook | 1 | -4/+7 |
| 2012-03-30 | ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers. | Andrew Towers | 1 | -1/+1 |
| 2012-03-15 | target-arm: Decode SETEND correctly in Thumb | Peter Maydell | 1 | -23/+40 |
| 2012-03-14 | target-arm: Don't overuse CPUState | Andreas Färber | 1 | -52/+52 |
