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path: root/target-arm/translate-a64.c
AgeCommit message (Expand)AuthorFilesLines
2013-12-17target-arm: A64: add support for logical (immediate) insnsAlexander Graf1-2/+173
2013-12-17target-arm: A64: add support for 1-src CLS insnClaudio Fontana1-1/+19
2013-12-17target-arm: A64: add support for bitfield insnsClaudio Fontana1-2/+54
2013-12-17target-arm: A64: add support for 1-src REV insnsClaudio Fontana1-1/+72
2013-12-17target-arm: A64: add support for 1-src RBIT insnAlexander Graf1-0/+20
2013-12-17target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana1-2/+50
2013-12-17target-arm: A64: add support for 2-src shift reg insnsAlexander Graf1-0/+22
2013-12-17target-arm: A64: add support for 2-src data processing and DIVAlexander Graf1-2/+70
2013-12-17target-arm: A64: add support for EXTRAlexander Graf1-2/+47
2013-12-17target-arm: A64: add support for ADR and ADRPAlexander Graf1-2/+23
2013-12-17target-arm: A64: add support for logical (shifted register)Alexander Graf1-6/+191
2013-12-17target-arm: A64: add support for conditional selectClaudio Fontana1-2/+65
2013-12-17target-arm: A64: add support for compare and branch immAlexander Graf1-2/+44
2013-12-17target-arm: A64: add support for 'test and branch' immAlexander Graf1-2/+25
2013-12-17target-arm: A64: add support for conditional branchesAlexander Graf1-2/+27
2013-12-17target-arm: A64: add support for BR, BLR and RET insnsAlexander Graf1-2/+41
2013-12-17target-arm: A64: add support for B and BL insnsAlexander Graf1-2/+62
2013-12-17target-arm: A64: expand decoding skeleton for system instructionsClaudio Fontana1-2/+129
2013-12-17target-arm: A64: provide skeleton for a64 insn decodingClaudio Fontana1-8/+362
2013-12-17target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell1-5/+204
2013-12-17target-arm: Clean up handling of AArch64 PSTATEPeter Maydell1-5/+7
2013-09-10target-arm: Add AArch64 translation stubAlexander Graf1-0/+139
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