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2016-08-12target-arm: Fix warn about implicit conversionPranith Kumar1-1/+1
Clang warns about an implicit conversion as follows: /mnt/devops/code/qemu/target-arm/neon_helper.c:1075:1: warning: implicit conversion from 'int' to 'int8_t' (aka 'signed char') changes value from 128 to -128 [-Wconstant-conversion] NEON_VOP_ENV(qrshl_s8, neon_s8, 4) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ /mnt/devops/code/qemu/target-arm/neon_helper.c:116:83: note: expanded from macro 'NEON_VOP_ENV' uint32_t HELPER(glue(neon_,name))(CPUARMState *env, uint32_t arg1, uint32_t arg2) \ ^ /mnt/devops/code/qemu/target-arm/neon_helper.c:106:5: note: expanded from macro '\ NEON_VOP_BODY' NEON_DO##n; \ ^~~~~~~~~~ <scratch space>:21:1: note: expanded from here NEON_DO4 ^~~~~~~~ /mnt/devops/code/qemu/target-arm/neon_helper.c:93:5: note: expanded from macro 'NEON_DO4' NEON_FN(vdest.v1, vsrc1.v1, vsrc2.v1); \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ /mnt/devops/code/qemu/target-arm/neon_helper.c:1054:23: note: expanded from macro 'NEON_FN' dest = (1 << (sizeof(src1) * 8 - 1)); \ ~ ~~^~~~~~~~~~~~~~~~~~~~~~~~~ Fix it by casting to appropriate type. Signed-off-by: Pranith Kumar <bobby.prani@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-18target-arm: Clean up includesPeter Maydell1-2/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com> Message-id: 1449505425-32022-3-git-send-email-peter.maydell@linaro.org
2014-06-09target-arm: add support for v8 VMULL.P64 instructionPeter Maydell1-0/+30
Add support for the VMULL.P64 polynomial 64x64 to 128 bit multiplication instruction in the A32/T32 instruction sets; this is part of the v8 Crypto Extensions. To do this we have to move the neon_pmull_64_{lo,hi} helpers from helper-a64.c into neon_helper.c so they can be used by the AArch32 translator. Inspired-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1401386724-26529-4-git-send-email-peter.maydell@linaro.org
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-1/+1
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-18target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)Alex Bennée1-0/+165
Add the saturating accumulate operations USQADD and SUQADD to the A64 instruction set. This completes coverage of A64 Neon. These operations (which are unsigned + signed -> signed and signed + unsigned -> unsigned) don't exist in the A32/T32 instruction set, so require a complete new set of helper functions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-03-18target-arm: A64: Add saturating int ops (SQNEG/SQABS)Alex Bennée1-0/+22
This mostly re-uses the existing NEON helpers with an additional two for the 64 bit case. I also took the opportunity to add TCG_CALL_NO_RWG options to the helpers as they don't modify globals (saturation flags are in the CPU Environment). Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-20target-arm: A64: Implement remaining 3-same instructionsPeter Maydell1-0/+16
Implement the remaining instructions in the SIMD 3-reg-same and scalar-3-reg-same groups: FMULX, FRECPS, FRSQRTS, FACGE, FACGT, FMLA and FMLS. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement 2-reg-misc CNT, NOT and RBITPeter Maydell1-0/+12
Implement the 2-reg-misc CNT, NOT and RBIT instructions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell1-12/+0
Use the VFP_BINOP macro to provide helpers for min, max, minnum and maxnum, rather than hand-rolling them. (The float64 max version is not used by A32 but will be needed for A64.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-24target-arm: Use TCG operation for Neon 64 bit negationPeter Maydell1-6/+0
Use the TCG operation to do Neon 64 bit negations rather than calling a helper routine for it. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-19target-arm/neon_helper: Remove obsolete FIXME commentPeter Maydell1-1/+0
Commit 33ebc29 fixed the bugs in the implementation of VQRSHL, but forgot to remove the FIXME comment... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-08-10target-arm: Fix typos in commentsPeter Maydell1-13/+13
Fix a variety of typos in comments in target-arm files. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-05-10target-arm: When setting FPSCR.QC, don't clear other FPSCR bitsMatt Craighead1-1/+1
This patch fixes a bug affecting a variety of Neon instructions, such as VQADD. Signed-off-by: Matt Craighead <mjcraighead@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-14target-arm: Don't overuse CPUStateAndreas Färber1-44/+44
Scripted conversion: sed -i "s/CPUState/CPUARMState/g" target-arm/*.[hc] sed -i "s/#define CPUARMState/#define CPUState/" target-arm/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-23Correct spelling of licensedMatthew Fernandez1-1/+1
Correct typos of "licenced" to "licensed". Reviewed-by: Stefan Weil <weil@mail.berlios.de> Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de> Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-06-22Revert "target-arm: Use global env in neon_helper.c helpers"Peter Maydell1-70/+74
This effectively reverts commit 2a3f75b42ac255be09ec2939b96c549ec830efd3 so that we return to passing CPUState to helpers as an explicit parameter. (There were a number of conflicts in target-arm/translate.c which had to be resolved by hand so it is not a pure revert.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22target-arm: Pass fp status pointer explicitly to neon fp helpersPeter Maydell1-33/+24
Make the Neon helpers for various floating point operations take an explicit pointer to the float_status they use, so they don't rely on the global environment pointer any more. This also allows us to drop the mul/sub/add helpers completely and just use the vfp versions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-05-23target-arm: Signal InvalidOp for Neon GE and GT compares of QNaNPeter Maydell1-22/+18
If the input to a Neon float comparison is a quiet NaN, the ARM ARM specifies that we should raise InvalidOp if the comparison is GE or GT but not for EQ. (Signaling NaNs raise InvalidOp regardless). This means only EQ should use the _quiet version of the comparison function. We implement this by cleaning up the comparison helpers to call the appopriate versions of the softfloat simple comparison functions (float32_le and friends) rather than the generic float32_compare functions. This makes them simple enough that they are clearer opencoded rather than macroised. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17move helpers.h to helper.hLluís1-1/+1
This provides a consistent naming scheme across all targets. Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-13target-arm: Don't overflow when calculating value for signed VABALPeter Maydell1-17/+21
In the VABAL instruction we take the absolute difference of two values of size x and store it in a result of size 2x. This means we have to be careful to calculate the absolute difference using a wide enough type that we don't accidentally overflow. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-04target-arm: Make Neon helper routines use correct FP statusPeter Maydell1-2/+1
Make the Neon helper routines use the correct FP status from the CPUEnv rather than using a dummy static one. This means they will correctly handle denormals and NaNs and will set FPSCR exception bits properly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-04target-arm: Use global env in neon_helper.c helpersPeter Maydell1-74/+70
Use the global 'env' variable in the helper functions in neon_helper.c. This means we don't need to pass env as an argument to them any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-03target-arm: Use new softfloat min/max functions for VMAX, VMINPeter Maydell1-6/+2
Use the new softfloat min/max functions to implement the Neon VMAX and VMIN instructions. This allows us to get the right behaviour for NaN and negative zero. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-03target-arm: Correct ABD's handling of negative zeroesPeter Maydell1-3/+1
Implement ABD by taking the absolute value of the difference of the operands (as the ARM ARM specifies) rather than by flipping the order of the operands to the subtract based on the results of a comparison. The latter approch gives the wrong answers for some edge cases like negative zero. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-03target-arm: Return right result for Neon comparison with NaNsPeter Maydell1-10/+18
Fix the helper functions implementing the Neon floating point comparison ops (VCGE, VCGT, VCEQ, VACGT, VACGE) to return the right answer when one of the values being compared is a NaN. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-03target-arm/neon_helper.c: Use make_float32/float32_val macrosPeter Maydell1-39/+17
Use the softfloat make_float32 and float32_val macros to convert between softfloat's float32 type and raw uint32_t types, rather than private conversion functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Fix unsigned VQRSHL by large shift countsPeter Maydell1-3/+34
Correctly handle VQRSHL of unsigned values by a shift count of the width of the data type or larger, which must be special-cased in the qrshl_u* helper functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Fix signed VQRSHL by large shift countsPeter Maydell1-3/+31
Handle the case of signed VQRSHL by a shift count of the width of the data type or larger, which must be special cased in the qrshl_s* helper functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Fix saturated values for Neon right shiftsPeter Maydell1-1/+4
Fix value returned by signed 8 and 16 bit qrshl helpers when the result has saturated. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: fix unsigned 64 bit right shifts.Christophe Lyon1-1/+1
Fix range of shift amounts which always give 0 as result. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Fix unsigned VRSHL.s8 and .s16 right shifts by type widthChristophe Lyon1-1/+1
Fix handling of unsigned VRSHL.s8 and .s16 right shifts by the type width. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Fix signed VRSHL by large shift countsPeter Maydell1-14/+3
Correctly handle VRSHL of signed values by a shift count of the width of the data type or larger, which must be special-cased in the rshl_s* helper functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Fix rounding constant addition for Neon shiftsChristophe Lyon1-12/+127
Handle cases where adding the rounding constant could overflow in Neon shift instructions: VRSHR, VRSRA, VQRSHRN, VQRSHRUN, VRSHRN. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> [peter.maydell@linaro.org: fix handling of large shifts in rshl_s32, calculate signed saturated value as other functions do.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Move Neon VZIP to helper functionsPeter Maydell1-0/+92
Move the implementation of the Neon VUZP unzip instruction from inline code to helper functions. (At 50+ TCG ops it was well over the recommended limit for coding inline.) The helper implementations also give the correct answers where the inline implementation did not. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Move Neon VUZP to helper functionsPeter Maydell1-0/+94
Move the implementation of the Neon VUZP unzip instruction from inline code to helper functions. (At 50+ TCG ops it was well over the recommended limit for coding inline.) The helper implementations also fix the handling of the quadword version of the instruction. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-20target-arm: Implement VMULL.P8Peter Maydell1-0/+30
Implement VMULL.P8 (the 32x32->64 version of the polynomial multiply instruction). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10target-arm: Remove stray #include from middle of neon_helper.cPeter Maydell1-1/+0
Remove a stray #include <stdio.h> from the middle of neon_helper.c: it was harmless but pointless since we include stdio.h at the top of the file anyway. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-09target-arm: Fix 32 bit signed saturating narrowPeter Maydell1-1/+1
The returned value when doing saturating signed 64->32 bit conversion of a negative number was incorrect due to a missing cast. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-09target-arm: Fix VQMOVUN Neon instruction.Juha Riihimäki1-0/+63
VQMOVUN does a signed-to-unsigned saturating conversion. This is different from both the signed-to-signed and unsigned-to-unsigned conversions already implemented, so we need a new set of helper functions (neon_unarrow_sat*). Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-04Set the right overflow bit for neon 32 and 64 bit saturating add/sub.Christophe Lyon1-0/+89
Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-29target-arm: Fix Neon VQ(R)DMULH.S16 instructionsJuha Riihimäki1-1/+2
Correct an error in the implementation of the 16 bit forms of VQ(R)DMULH, bringing them into line with the 32 bit implementation. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-12ARM: add neon helpers for VQSHLUJuha Riihimäki1-0/+47
Add neon helper functions to implement VQSHLU, which is a signed-to-unsigned version of VQSHL available only as an immediate form. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27target-arm: Correct result in saturating cases for VQSHL of s8/16/32Peter Maydell1-3/+12
Where VQSHL of a signed 8/16/32 bit value saturated, the result value was not being calculated correctly (it should be either the minimum or maximum value for the size of the signed type). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27target-arm: remove pointless else clause in VQSHL of u64Juha Riihimäki1-2/+0
Remove a pointless else clause in the neon_qshl_u64 helper. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27target-arm: Fix VQSHL of signed 64 bit values by shift counts >= 64Peter Maydell1-1/+1
VQSHL of a signed 64 bit non-zero value by a shift count >= 64 should saturate; return the correct value in this case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27target-arm: Fix VQSHL of signed 64 bit valuesJuha Riihimäki1-1/+1
Add a missing '-' which meant that we were misinterpreting the shift argument for VQSHL of 64 bit signed values and treating almost every shift value as if it were an extremely large right shift. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-27target-arm: fix neon shift helper functionsJuha Riihimäki1-12/+14
Current code is broken at least on recent compilers, comparison between signed and unsigned types yield incorrect code and render the neon shift helper functions defunct. This is the third revision of this patch, casting all comparisons with the sizeof operator to signed ssize_t type to force comparisons to be between signed integral types. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-09Fixe ARM NEON vrshl.Paul Brook1-2/+2
Signed-off-by: Paul Brook <paul@codesourcery.com>
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