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2008-07-19ARMv6: fix SIMD add/sub carry flags (Vincent Palatin).balrog1-4/+4
After a quick code review, it seems to be a bad cut-n-paste between 16-bit and 8-bit UADD/USUB, indeed UADD8/USUB8 tries to set GE bits by pair instead of one at a time. Besides, the addition operations (UADD8/UADD16) set GE bits to "NOT carry" instead of "carry" (probably once again due to a copy of the substraction code which sets flags to "NOT borrow") git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4900 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19Fix smlald, smlsld, pkhtp, pkhbt, ssat, usat, umul, smul... (Laurent Desnogues).balrog1-3/+3
helper.c - copy reference c0_c2 to runtime c0_c2 and not c0_c1 op_helper.c - remove old code (PARAM1, probably some left over from old dyngen) that broke do_[us]sat translate.c - gen_smul_dual should sign-extend from 16 bit to 32 bit and not from 8 to 32 - disas_arm_insn: * smlalxy: that was completely wrong; now the addition is performed as for smlald * pkhtb: optional ASR not taken into account (similar * to [us]sat) * pkhtb/pkhbt: tmp2 is dead * smlald, smlsld, smuad, smusd, smlad, smlsd: rd * and rn swapped git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4898 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-02ARMv7-M interrupt stack alignment fix.pbrook1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4823 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-01Fix incorrect argument types.pbrook1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4291 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-20Remove an unused field and fix some non-code typos.balrog1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4222 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-20Correct more ARM VFP 32/64 and signed/unsigned typos.balrog1-2/+2
Fixes unreadable fonts in Maemo guest. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4221 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-14Add basic OMAP2 chip support.balrog1-0/+7
Add the OMAP242x (arm1136 core) initialisation with basic on-chip peripherals and update OMAP1 peripherals which are re-used in OMAP2. Make palmte.c and sd.c errors go to stderr. Allow disabling SD chipselect. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4213 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13Store the right TCG temp (typo).balrog1-1/+1
Stops ARMv6 target from segfaulting early. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4201 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11Remove osdep.c/qemu-img code duplicationaurel321-0/+1
(Kevin Wolf) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11Fix few spelling issues in commentsaurel321-4/+4
(Stefan Weil) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4187 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-01ARM N=Z=1 flag fix.pbrook1-8/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4156 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 14/16.pbrook1-24/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4151 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 13/16.pbrook1-6/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4150 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 12/16.pbrook1-12/+12
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4149 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 11/16.pbrook1-1/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 10/16.pbrook1-0/+363
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 9/16.pbrook1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 7/16.pbrook1-0/+245
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 6/16.pbrook1-0/+29
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4143 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 4/16.pbrook1-2/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4141 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 2/16.pbrook1-0/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4139 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31ARM TCG conversion 1/16.pbrook1-0/+26
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-24Thumb semihosting fixes.pbrook1-1/+10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3729 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-13Prevent cpsr_write/_read be put out of line in op.o (fixes a segfault on ↵balrog1-0/+42
some platforms). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11ARMv7 support.pbrook1-181/+923
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10added cpu_model parameter to cpu_init()bellard1-8/+11
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-31Invalidate TLBs when domains are changed (Matthew Warton).balrog1-2/+1
Legalise cp15 pid register writes (Matthew Warton). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3494 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-4/+5
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-12Unify '-cpu ?' option.j_mayer1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-08-01Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class.balrog1-3/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3107 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-29Fix XScale MMU's extended small pages.balrog1-5/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3093 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-29Basic OMAP310 support. Basic Palm Tungsten|E machine emulation.balrog1-1/+75
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3091 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-24Reset ARM cp15.c1_sys to default values. Fix XScale cp15 accesses.balrog1-4/+17
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3013 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-08ARM946 CPU support.pbrook1-41/+209
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2783 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-30Implement iwMMXt instruction set for the PXA270 cpu.balrog1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-30Core features of ARM XScale processors. Main PXA270 and PXA255 peripherals.balrog1-11/+124
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2749 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29Fix ARM fine pagetables.pbrook1-1/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2742 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07cpu_get_phys_page_debug should return target_phys_addr_tj_mayer1-2/+2
instead of target_ulong to be consistent. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-11ARM reabbot support (orginal patch by Aurelien Jarno).pbrook1-22/+31
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-08Fix typo in help output.pbrook1-0/+10
List ARM cpus. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2475 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-08Implement --cpu for ARM.pbrook1-1/+28
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2474 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-20Add ARM Angel semihosting to system emulation.pbrook1-0/+18
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2340 c046a42c-6fe2-441c-8c8c-71466251a162
2006-09-09Arm MMU fix (Justin Fletcher).pbrook1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2154 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-21Fix Arm cp15 c13 (Process ID) register writes.pbrook1-2/+10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2067 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-14Fix FIQ bank switching.pbrook1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1786 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-20Add Arm926 core support.pbrook1-2/+61
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1765 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-04Implement Arm BKPT instruction.pbrook1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1740 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-18switching to Arm mode in do_interrupt() (Paul Brook)bellard1-2/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1711 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.1 at 2024-10-18 13:32:48 +0000