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target-arm
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helper.c
Age
Commit message (
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Author
Files
Lines
2014-03-13
cputlb: Change tlb_flush() argument to CPUState
Andreas Färber
1
-10
/
+29
2014-03-13
cputlb: Change tlb_flush_page() argument to CPUState
Andreas Färber
1
-4
/
+10
2014-03-13
exec: Change cpu_abort() argument to CPUState
Andreas Färber
1
-10
/
+25
2014-03-13
cpu: Move exception_index field from CPU_COMMON to CPUState
Andreas Färber
1
-14
/
+11
2014-03-13
cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook
Andreas Färber
1
-4
/
+9
2014-03-13
cpu: Factor out cpu_generic_init()
Andreas Färber
1
-13
/
+1
2014-03-13
target-arm: Clean up ENV_GET_CPU() usage
Andreas Färber
1
-5
/
+7
2014-03-10
target-arm: Implements the ARM PMCCNTR register
Alistair Francis
1
-4
/
+85
2014-03-10
target-arm: Fix incorrect setting of E bit in CPSR
Peter Maydell
1
-1
/
+1
2014-02-26
target-arm: Add support for AArch32 ARMv8 CRC32 instructions
Will Newton
1
-0
/
+39
2014-02-26
target-arm: Implement AArch64 view of CPACR
Peter Maydell
1
-1
/
+2
2014-02-26
target-arm: Store AIF bits in env->pstate for AArch32
Peter Maydell
1
-12
/
+17
2014-02-26
target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI
Peter Maydell
1
-0
/
+4
2014-02-26
target-arm: Implement AArch64 dummy breakpoint and watchpoint registers
Peter Maydell
1
-0
/
+32
2014-02-26
target-arm: Implement AArch64 ID and feature registers
Peter Maydell
1
-0
/
+45
2014-02-26
target-arm: Implement AArch64 generic timers
Peter Maydell
1
-11
/
+72
2014-02-26
target-arm: Implement AArch64 MPIDR
Peter Maydell
1
-2
/
+4
2014-02-26
target-arm: Implement AArch64 TTBR*
Peter Maydell
1
-59
/
+30
2014-02-26
target-arm: Implement AArch64 VBAR_EL1
Peter Maydell
1
-1
/
+8
2014-02-26
target-arm: Implement AArch64 TCR_EL1
Peter Maydell
1
-3
/
+16
2014-02-26
target-arm: Implement AArch64 SCTLR_EL1
Peter Maydell
1
-1
/
+2
2014-02-26
target-arm: Implement AArch64 memory attribute registers
Peter Maydell
1
-1
/
+23
2014-02-26
target-arm: Implement AArch64 dummy MDSCR_EL1
Peter Maydell
1
-0
/
+6
2014-02-26
target-arm: Implement AArch64 TLB invalidate ops
Peter Maydell
1
-0
/
+73
2014-02-26
target-arm: Implement AArch64 cache invalidate/clean ops
Peter Maydell
1
-0
/
+47
2014-02-26
target-arm: Implement AArch64 MIDR_EL1
Peter Maydell
1
-0
/
+3
2014-02-26
target-arm: Implement AArch64 CurrentEL sysreg
Peter Maydell
1
-0
/
+3
2014-02-26
target-arm: A64: Make cache ID registers visible to AArch64
Peter Maydell
1
-10
/
+21
2014-02-26
target-arm: Fix raw read and write functions on AArch64 registers
Peter Maydell
1
-2
/
+6
2014-02-26
target-arm: Load correct access bits from ARMv5 level 2 page table descriptors
Peter Maydell
1
-1
/
+1
2014-02-26
target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS ops
Peter Maydell
1
-2
/
+2
2014-02-20
target-arm: Fix incorrect type for value argument to write_raw_cp_reg
Peter Maydell
1
-1
/
+1
2014-02-20
target-arm: Remove failure status return from read/write_raw_cp_reg
Peter Maydell
1
-24
/
+12
2014-02-20
target-arm: Drop success/fail return from cpreg read and write functions
Peter Maydell
1
-173
/
+115
2014-02-20
target-arm: Convert miscellaneous reginfo structs to accessfn
Peter Maydell
1
-25
/
+19
2014-02-20
target-arm: Convert generic timer reginfo to accessfn
Peter Maydell
1
-56
/
+66
2014-02-20
target-arm: Convert performance monitor reginfo to accessfn
Peter Maydell
1
-42
/
+28
2014-02-20
target-arm: Stop underdecoding ARM946 PRBS registers
Peter Maydell
1
-23
/
+24
2014-02-20
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
Peter Maydell
1
-0
/
+3
2014-02-20
target-arm: Define names for SCTLR bits
Peter Maydell
1
-8
/
+8
2014-02-11
exec: Make stl_*_phys input an AddressSpace
Edgar E. Iglesias
1
-1
/
+2
2014-02-11
exec: Make ldq/ldub_*_phys input an AddressSpace
Edgar E. Iglesias
1
-1
/
+2
2014-02-11
exec: Make ldl_*_phys input an AddressSpace
Edgar E. Iglesias
1
-6
/
+9
2014-01-31
target-arm: Add set_neon_rmode helper
Will Newton
1
-0
/
+17
2014-01-31
target-arm: Move arm_rmode_to_sf to a shared location.
Will Newton
1
-0
/
+28
2014-01-08
target-arm: A64: Add support for FCVT between half, single and double
Peter Maydell
1
-0
/
+20
2014-01-08
target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
Peter Maydell
1
-0
/
+45
2014-01-08
target-arm: A64: Add floating-point<->fixed-point instructions
Alexander Graf
1
-0
/
+13
2014-01-08
target-arm: A64: Add extra VFP fixed point conversion helpers
Will Newton
1
-1
/
+10
2014-01-08
target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
Peter Maydell
1
-0
/
+9
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