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path: root/target-arm/helper.c
AgeCommit message (Expand)AuthorFilesLines
2014-02-26target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton1-0/+39
2014-02-26target-arm: Implement AArch64 view of CPACRPeter Maydell1-1/+2
2014-02-26target-arm: Store AIF bits in env->pstate for AArch32Peter Maydell1-12/+17
2014-02-26target-arm: Implement AArch64 OSLAR_EL1 sysreg as WIPeter Maydell1-0/+4
2014-02-26target-arm: Implement AArch64 dummy breakpoint and watchpoint registersPeter Maydell1-0/+32
2014-02-26target-arm: Implement AArch64 ID and feature registersPeter Maydell1-0/+45
2014-02-26target-arm: Implement AArch64 generic timersPeter Maydell1-11/+72
2014-02-26target-arm: Implement AArch64 MPIDRPeter Maydell1-2/+4
2014-02-26target-arm: Implement AArch64 TTBR*Peter Maydell1-59/+30
2014-02-26target-arm: Implement AArch64 VBAR_EL1Peter Maydell1-1/+8
2014-02-26target-arm: Implement AArch64 TCR_EL1Peter Maydell1-3/+16
2014-02-26target-arm: Implement AArch64 SCTLR_EL1Peter Maydell1-1/+2
2014-02-26target-arm: Implement AArch64 memory attribute registersPeter Maydell1-1/+23
2014-02-26target-arm: Implement AArch64 dummy MDSCR_EL1Peter Maydell1-0/+6
2014-02-26target-arm: Implement AArch64 TLB invalidate opsPeter Maydell1-0/+73
2014-02-26target-arm: Implement AArch64 cache invalidate/clean opsPeter Maydell1-0/+47
2014-02-26target-arm: Implement AArch64 MIDR_EL1Peter Maydell1-0/+3
2014-02-26target-arm: Implement AArch64 CurrentEL sysregPeter Maydell1-0/+3
2014-02-26target-arm: A64: Make cache ID registers visible to AArch64Peter Maydell1-10/+21
2014-02-26target-arm: Fix raw read and write functions on AArch64 registersPeter Maydell1-2/+6
2014-02-26target-arm: Load correct access bits from ARMv5 level 2 page table descriptorsPeter Maydell1-1/+1
2014-02-26target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS opsPeter Maydell1-2/+2
2014-02-20target-arm: Fix incorrect type for value argument to write_raw_cp_regPeter Maydell1-1/+1
2014-02-20target-arm: Remove failure status return from read/write_raw_cp_regPeter Maydell1-24/+12
2014-02-20target-arm: Drop success/fail return from cpreg read and write functionsPeter Maydell1-173/+115
2014-02-20target-arm: Convert miscellaneous reginfo structs to accessfnPeter Maydell1-25/+19
2014-02-20target-arm: Convert generic timer reginfo to accessfnPeter Maydell1-56/+66
2014-02-20target-arm: Convert performance monitor reginfo to accessfnPeter Maydell1-42/+28
2014-02-20target-arm: Stop underdecoding ARM946 PRBS registersPeter Maydell1-23/+24
2014-02-20target-arm: Restrict check_ap() use of S and R bits to v6 and earlierPeter Maydell1-0/+3
2014-02-20target-arm: Define names for SCTLR bitsPeter Maydell1-8/+8
2014-02-11exec: Make stl_*_phys input an AddressSpaceEdgar E. Iglesias1-1/+2
2014-02-11exec: Make ldq/ldub_*_phys input an AddressSpaceEdgar E. Iglesias1-1/+2
2014-02-11exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias1-6/+9
2014-01-31target-arm: Add set_neon_rmode helperWill Newton1-0/+17
2014-01-31target-arm: Move arm_rmode_to_sf to a shared location.Will Newton1-0/+28
2014-01-08target-arm: A64: Add support for FCVT between half, single and doublePeter Maydell1-0/+20
2014-01-08target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructionsPeter Maydell1-0/+45
2014-01-08target-arm: A64: Add floating-point<->fixed-point instructionsAlexander Graf1-0/+13
2014-01-08target-arm: A64: Add extra VFP fixed point conversion helpersWill Newton1-1/+10
2014-01-08target-arm: Ignore most exceptions from scalbn when doing fixpoint conversionPeter Maydell1-0/+9
2014-01-08target-arm: Rename A32 VFP conversion helpersWill Newton1-5/+14
2014-01-08target-arm: Prepare VFP_CONV_FIX helpers for A64 usesWill Newton1-14/+14
2014-01-08target-arm: remove raw_read|write duplicationPeter Crosthwaite1-10/+2
2014-01-08target-arm: use c13_context field for CONTEXTIDRSergey Fedorov1-1/+1
2014-01-08target-arm: Give the FPSCR rounding modes namesAlexander Graf1-4/+4
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell1-25/+4
2014-01-07target-arm: Widen thread-local register state fields to 64 bitsPeter Maydell1-7/+15
2014-01-07target-arm: A64: Implement minimal set of EL0-visible sysregsPeter Maydell1-0/+61
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell1-6/+6
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