| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2014-02-20 | target-arm: A64: Implement remaining 3-same instructions | Peter Maydell | 1 | -0/+60 |
| 2014-02-20 | target-arm: A64: Implement SIMD FP compare and set insns | Alex Bennée | 1 | -0/+19 |
| 2014-02-20 | target-arm: A64: Implement plain vector SIMD indexed element insns | Peter Maydell | 1 | -0/+26 |
| 2014-01-31 | target-arm: A64: Add SIMD TBL/TBLX | Michael Matz | 1 | -0/+31 |
| 2014-01-08 | target-arm: A64: Add support for floating point compare | Claudio Fontana | 1 | -0/+45 |
| 2013-12-17 | target-arm: A64: add support for 1-src CLS insn | Claudio Fontana | 1 | -0/+10 |
| 2013-12-17 | target-arm: A64: add support for 1-src RBIT insn | Alexander Graf | 1 | -0/+18 |
| 2013-12-17 | target-arm: A64: add support for 1-src data processing and CLZ | Claudio Fontana | 1 | -0/+5 |
| 2013-12-17 | target-arm: A64: add support for 2-src data processing and DIV | Alexander Graf | 1 | -0/+21 |
| 2013-12-17 | target-arm: A64: add stubs for a64 specific helpers | Alexander Graf | 1 | -0/+25 |
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index : riscv-gnu-toolchain/qemu.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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